Dheeraj Srinivasan

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memories for performing successive programming operations
- Patent number 12,340,851
- Issue date Jun 24, 2025
- Micron Technology, Inc.
- Umberto Siciliani
- G11 - INFORMATION STORAGE
Information Patent Grant
Boost voltage modulated corrective read
- Patent number 12,315,575
- Issue date May 27, 2025
- Micron Technology, Inc.
- Nagendra Prasad Ganesh Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Resumption of program or erase operations in memory
- Patent number 12,300,332
- Issue date May 13, 2025
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Independent plane architecture in a memory device
- Patent number 12,271,592
- Issue date Apr 8, 2025
- Micron Technology, Inc.
- Andrea Giovanni Xotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple plane programming with quick plane programming termination...
- Patent number 12,204,422
- Issue date Jan 21, 2025
- Micron Technology, Inc.
- Lu Tong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Continuous memory programming operations
- Patent number 12,094,547
- Issue date Sep 17, 2024
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Efficient cache program operation with data encoding
- Patent number 12,079,134
- Issue date Sep 3, 2024
- Micron Technology, Inc.
- Sushanth Bhushan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Status polling based on die-generated pulsed signal
- Patent number 11,972,135
- Issue date Apr 30, 2024
- Micron Technology, Inc.
- Eric N. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices with four data line bias levels
- Patent number 11,915,758
- Issue date Feb 27, 2024
- Micron Technology, Inc.
- Hao T. Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory status command aggregation
- Patent number 11,861,228
- Issue date Jan 2, 2024
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resumption of program or erase operations in memory
- Patent number 11,763,900
- Issue date Sep 19, 2023
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory devices for suspend and resume operations
- Patent number 11,735,268
- Issue date Aug 22, 2023
- Micron Technology, Inc.
- Umberto Siciliani
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitline driver isolation from page buffer circuitry in memory device
- Patent number 11,688,466
- Issue date Jun 27, 2023
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Checking status of multiple memory dies in a memory sub-system
- Patent number 11,662,939
- Issue date May 30, 2023
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory devices with four data line bias levels
- Patent number 11,562,791
- Issue date Jan 24, 2023
- Micron Technology, Inc.
- Hao T. Nguyen
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods to control memory operations on buffers
- Patent number 11,556,251
- Issue date Jan 17, 2023
- Micron Technology, Inc.
- Ali Mohammadzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resumption of program or erase operations in memory
- Patent number 11,456,039
- Issue date Sep 27, 2022
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Data programming
- Patent number 11,334,265
- Issue date May 17, 2022
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitline driver isolation from page buffer circuitry in memory device
- Patent number 11,276,470
- Issue date Mar 15, 2022
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatuses and methods for automated dynamic word line start voltage
- Patent number 11,264,099
- Issue date Mar 1, 2022
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Last written page searching
- Patent number 10,977,186
- Issue date Apr 13, 2021
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partially written superblock treatment
- Patent number 10,949,291
- Issue date Mar 16, 2021
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods to control memory operations on buffers
- Patent number 10,936,210
- Issue date Mar 2, 2021
- Micron Technology, Inc.
- Ali Mohammadzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for automated dynamic word line start voltage
- Patent number 10,832,779
- Issue date Nov 10, 2020
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
One check fail byte (CFBYTE) scheme
- Patent number 10,762,974
- Issue date Sep 1, 2020
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE
Information Patent Grant
Data programming
- Patent number 10,698,624
- Issue date Jun 30, 2020
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partially written superblock treatment
- Patent number 10,552,254
- Issue date Feb 4, 2020
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for automated dynamic word line start voltage
- Patent number 10,388,379
- Issue date Aug 20, 2019
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods to control memory operations on buffers
- Patent number 10,372,353
- Issue date Aug 6, 2019
- Micron Technology, Inc.
- Ali Mohammadzadeh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
One check fail byte (CFBYTE) scheme
- Patent number 10,354,738
- Issue date Jul 16, 2019
- Micron Technology, Inc.
- Aliasgar S. Madraswala
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE COARSE THRESHOLD ESTIMATE READ UNDER MULTI-PLANE MODE
- Publication number 20250239311
- Publication date Jul 24, 2025
- Micron Technology, Inc.
- Luis Iam
- G11 - INFORMATION STORAGE
Information Patent Application
INDEPENDENT PLANE ARCHITECTURE IN A MEMORY DEVICE
- Publication number 20250217035
- Publication date Jul 3, 2025
- Micron Technology, Inc.
- Andrea Giovanni Xotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONFIGURED TO RESUME A SUSPENDED ERASE OPERATION WITH A VARI...
- Publication number 20250210116
- Publication date Jun 26, 2025
- Micron Technology, Inc.
- Kannan Abinaya
- G11 - INFORMATION STORAGE
Information Patent Application
DETECTING BLOCK SWITCHING DURING BACKGROUND OPERATIONS TO IMPROVE S...
- Publication number 20250199690
- Publication date Jun 19, 2025
- Micron Technology, Inc.
- Kapil Verma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE PLANE PROGRAMMING WITH QUICK PLANE PROGRAMMING TERMINATION...
- Publication number 20250110841
- Publication date Apr 3, 2025
- Micron Technology, Inc.
- Lu Tong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANDOMIZED OR PROGRAM-ERASE-CYCLE- DEPENDENT PROGRAM VERIFY SCHEME
- Publication number 20250086282
- Publication date Mar 13, 2025
- Micron Technology, Inc.
- Yu-Chung LIEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTION OF AN OPTIMAL SINGLE LEVEL CELL PROGRAMMING SCHEME
- Publication number 20250022515
- Publication date Jan 16, 2025
- Micron Technology, Inc.
- Yu-Chung LIEN
- G11 - INFORMATION STORAGE
Information Patent Application
CONTINUOUS MEMORY PROGRAMMING OPERATIONS
- Publication number 20240428872
- Publication date Dec 26, 2024
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
RESAMPLE START VOLTAGE FOR CALIBRATION IN A PROGRAM OPERATION IMPRO...
- Publication number 20240412787
- Publication date Dec 12, 2024
- Micron Technology, Inc.
- Edric Goh
- G11 - INFORMATION STORAGE
Information Patent Application
CACHE MANAGEMENT DURING EXECUTION OF A PROGRAM OPERATION
- Publication number 20240378156
- Publication date Nov 14, 2024
- Micron Technology, Inc.
- Sushanth Bhushan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATUS POLLING BASED ON DIE-GENERATED PULSED SIGNAL
- Publication number 20240231675
- Publication date Jul 11, 2024
- Micron Technology, Inc.
- Eric N. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXECUTION OF PROLOGUE SUB-OPERATIONS OF A PROGRAMMING OPERATION DUR...
- Publication number 20240170069
- Publication date May 23, 2024
- Micron Technology, Inc.
- Hojung Yun
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICE PRODUCING METADATA CHARACTERIZING APPLIED READ VOLTAG...
- Publication number 20240071521
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Dung Viet Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
RESUMPTION OF PROGRAM OR ERASE OPERATIONS IN MEMORY
- Publication number 20240006001
- Publication date Jan 4, 2024
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE PLANE PROGRAMMING WITH QUICK PLANE PROGRAMMING TERMINATION...
- Publication number 20230367680
- Publication date Nov 16, 2023
- Micron Technology, Inc.
- Lu Tong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOOST VOLTAGE MODULATED CORRECTIVE READ
- Publication number 20230352098
- Publication date Nov 2, 2023
- Micron Technology, Inc.
- Nagendra Prasad Ganesh Rao
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING
- Publication number 20230325323
- Publication date Oct 12, 2023
- Micron Technology, Inc.
- Sushanth Bhushan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORRECTIVE READS IMPLEMENTING INCREMENTAL READS WITH RESPECT TO ADJ...
- Publication number 20230305717
- Publication date Sep 28, 2023
- Micron Technology, Inc.
- Dheeraj Srinivasan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHODS FOR PERFORMING SUCCESSIVE ARRAY OPERATIONS IN...
- Publication number 20230298680
- Publication date Sep 21, 2023
- Micron Technology, Inc.
- Umberto Siciliani
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES WITH FOUR DATA LINE BIAS LEVELS
- Publication number 20230162793
- Publication date May 25, 2023
- Micron Technology, Inc.
- Hao T. Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
CONTINUOUS MEMORY PROGRAMMING OPERATIONS
- Publication number 20230060312
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
INDEPENDENT PLANE ARCHITECTURE IN A MEMORY DEVICE
- Publication number 20230059543
- Publication date Feb 23, 2023
- Micron Technology, Inc.
- Andrea Giovanni Xotta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY DEVICES WITH FOUR DATA LINE BIAS LEVELS
- Publication number 20230039026
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Hao T. Nguyen
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY STATUS COMMAND AGGREGATION
- Publication number 20230043418
- Publication date Feb 9, 2023
- Micron Technology, Inc.
- Karl D. Schuh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATUS POLLING BASED ON DIE-GENERATED PULSED SIGNAL
- Publication number 20230024167
- Publication date Jan 26, 2023
- Micron Technology, Inc.
- Eric N. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESUMPTION OF PROGRAM OR ERASE OPERATIONS IN MEMORY
- Publication number 20230018681
- Publication date Jan 19, 2023
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICES FOR SUSPEND AND RESUME OPERATIONS
- Publication number 20220208273
- Publication date Jun 30, 2022
- Micron Technology, Inc.
- Umberto Siciliani
- G11 - INFORMATION STORAGE
Information Patent Application
BITLINE DRIVER ISOLATION FROM PAGE BUFFER CIRCUITRY IN MEMORY DEVICE
- Publication number 20220180936
- Publication date Jun 9, 2022
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE
Information Patent Application
RESUMPTION OF PROGRAM OR ERASE OPERATIONS IN MEMORY
- Publication number 20220165340
- Publication date May 26, 2022
- Micron Technology, Inc.
- Eric N. Lee
- G11 - INFORMATION STORAGE
Information Patent Application
BITLINE DRIVER ISOLATION FROM PAGE BUFFER CIRCUITRY IN MEMORY DEVICE
- Publication number 20220020435
- Publication date Jan 20, 2022
- Micron Technology, Inc.
- Violante Moschiano
- G11 - INFORMATION STORAGE

Dheeraj Srinivasan

Person

Patents Grantslast 30 patents

Memories for performing successive programming operations

Boost voltage modulated corrective read

Resumption of program or erase operations in memory

Independent plane architecture in a memory device

Multiple plane programming with quick plane programming termination...

Continuous memory programming operations

Efficient cache program operation with data encoding

Status polling based on die-generated pulsed signal

Memory devices with four data line bias levels

Memory status command aggregation

Resumption of program or erase operations in memory

Memory devices for suspend and resume operations

Bitline driver isolation from page buffer circuitry in memory device

Checking status of multiple memory dies in a memory sub-system

Memory devices with four data line bias levels

Apparatuses and methods to control memory operations on buffers

Resumption of program or erase operations in memory

Data programming

Bitline driver isolation from page buffer circuitry in memory device

Apparatuses and methods for automated dynamic word line start voltage

Last written page searching

Partially written superblock treatment

Apparatuses and methods to control memory operations on buffers

Apparatuses and methods for automated dynamic word line start voltage

One check fail byte (CFBYTE) scheme

Data programming

Partially written superblock treatment

Apparatuses and methods for automated dynamic word line start voltage

Apparatuses and methods to control memory operations on buffers

One check fail byte (CFBYTE) scheme

Patents Applicationslast 30 patents

MEMORY DEVICE COARSE THRESHOLD ESTIMATE READ UNDER MULTI-PLANE MODE

INDEPENDENT PLANE ARCHITECTURE IN A MEMORY DEVICE

MEMORY CONFIGURED TO RESUME A SUSPENDED ERASE OPERATION WITH A VARI...

DETECTING BLOCK SWITCHING DURING BACKGROUND OPERATIONS TO IMPROVE S...

MULTIPLE PLANE PROGRAMMING WITH QUICK PLANE PROGRAMMING TERMINATION...

RANDOMIZED OR PROGRAM-ERASE-CYCLE- DEPENDENT PROGRAM VERIFY SCHEME

SELECTION OF AN OPTIMAL SINGLE LEVEL CELL PROGRAMMING SCHEME

CONTINUOUS MEMORY PROGRAMMING OPERATIONS

RESAMPLE START VOLTAGE FOR CALIBRATION IN A PROGRAM OPERATION IMPRO...

CACHE MANAGEMENT DURING EXECUTION OF A PROGRAM OPERATION

STATUS POLLING BASED ON DIE-GENERATED PULSED SIGNAL

EXECUTION OF PROLOGUE SUB-OPERATIONS OF A PROGRAMMING OPERATION DUR...

MEMORY DEVICE PRODUCING METADATA CHARACTERIZING APPLIED READ VOLTAG...

RESUMPTION OF PROGRAM OR ERASE OPERATIONS IN MEMORY

MULTIPLE PLANE PROGRAMMING WITH QUICK PLANE PROGRAMMING TERMINATION...

BOOST VOLTAGE MODULATED CORRECTIVE READ

EFFICIENT CACHE PROGRAM OPERATION WITH DATA ENCODING

CORRECTIVE READS IMPLEMENTING INCREMENTAL READS WITH RESPECT TO ADJ...

APPARATUS AND METHODS FOR PERFORMING SUCCESSIVE ARRAY OPERATIONS IN...

MEMORY DEVICES WITH FOUR DATA LINE BIAS LEVELS

CONTINUOUS MEMORY PROGRAMMING OPERATIONS

INDEPENDENT PLANE ARCHITECTURE IN A MEMORY DEVICE

MEMORY DEVICES WITH FOUR DATA LINE BIAS LEVELS

MEMORY STATUS COMMAND AGGREGATION

STATUS POLLING BASED ON DIE-GENERATED PULSED SIGNAL

RESUMPTION OF PROGRAM OR ERASE OPERATIONS IN MEMORY

MEMORY DEVICES FOR SUSPEND AND RESUME OPERATIONS

BITLINE DRIVER ISOLATION FROM PAGE BUFFER CIRCUITRY IN MEMORY DEVICE

RESUMPTION OF PROGRAM OR ERASE OPERATIONS IN MEMORY

BITLINE DRIVER ISOLATION FROM PAGE BUFFER CIRCUITRY IN MEMORY DEVICE