DINESH K. JAIN

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Extended fuse reprogrammability mechanism
- Patent number 9,740,622
- Issue date Aug 22, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Core-specific fuse mechanism for a multi-core die
- Patent number 9,727,477
- Issue date Aug 8, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for configurable redundant fuse banks
- Patent number 9,727,478
- Issue date Aug 8, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for storage and decompression of configuration...
- Patent number 9,715,456
- Issue date Jul 25, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core fuse decompression mechanism
- Patent number 9,715,457
- Issue date Jul 25, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for extended cache correction
- Patent number 9,710,390
- Issue date Jul 18, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core data array power gating restoral mechanism
- Patent number 9,690,511
- Issue date Jun 27, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for repairing cache arrays in a multi-core mic...
- Patent number 9,665,490
- Issue date May 30, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core apparatus and method for restoring data arrays following...
- Patent number 9,606,933
- Issue date Mar 28, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core microprocessor power gating cache restoral programming m...
- Patent number 9,594,690
- Issue date Mar 14, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core programming apparatus and method for restoring data arra...
- Patent number 9,594,691
- Issue date Mar 14, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core data array power gating cache restoral programming mecha...
- Patent number 9,582,429
- Issue date Feb 28, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core programming apparatus and method for restoring data arra...
- Patent number 9,582,428
- Issue date Feb 28, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for compression of configuration data
- Patent number 9,535,847
- Issue date Jan 3, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core microprocessor power gating cache restoral mechanism
- Patent number 9,524,241
- Issue date Dec 20, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for rapid fuse bank access in a multi-core pro...
- Patent number 9,477,608
- Issue date Oct 25, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core microprocessor configuration data compression and decomp...
- Patent number 9,471,502
- Issue date Oct 18, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for configurable redundant fuse banks
- Patent number 9,396,124
- Issue date Jul 19, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core data array power gating restoral mechanism
- Patent number 9,395,802
- Issue date Jul 19, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Core-specific fuse mechanism for a multi-core die
- Patent number 9,396,123
- Issue date Jul 19, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for extended cache correction
- Patent number 9,390,022
- Issue date Jul 12, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-core fuse decompression mechanism
- Patent number 9,384,141
- Issue date Jul 5, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for storage and decompression of configuration...
- Patent number 9,384,140
- Issue date Jul 5, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Extended fuse reprogrammability mechanism
- Patent number 9,378,147
- Issue date Jun 28, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Correctable configuration data compression and decompression system
- Patent number 9,348,690
- Issue date May 24, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Microprocessor mechanism for decompression of cache correction data
- Patent number 9,223,715
- Issue date Dec 29, 2015
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for compression and decompression of microproc...
- Patent number 8,982,655
- Issue date Mar 17, 2015
- Via Technologies, Inc.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Microprocessor mechanism for decompression of fuse correction data
- Patent number 8,879,345
- Issue date Nov 4, 2014
- Via Technologies, Inc.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Grant
Microprocessor apparatus and method for securing a programmable fus...
- Patent number 8,429,471
- Issue date Apr 23, 2013
- Via Technologies, Inc.
- G. Glenn Henry
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for tamper protection of a microprocessor fuse...
- Patent number 8,341,472
- Issue date Dec 25, 2012
- Via Technologies, Inc.
- G. Glenn Henry
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
MULTI-CORE DATA ARRAY POWER GATING RESTORAL MECHANISM
- Publication number 20160350022
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR CONFIGURABLE REDUNDANT FUSE BANKS
- Publication number 20160321005
- Publication date Nov 3, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORE-SPECIFIC FUSE MECHANISM FOR A MULTI-CORE DIE
- Publication number 20160321004
- Publication date Nov 3, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EXTENDED CACHE CORRECTION
- Publication number 20160321192
- Publication date Nov 3, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR STORAGE AND DECOMPRESSION OF CONFIGURATION...
- Publication number 20160314080
- Publication date Oct 27, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE FUSE DECOMPRESSION MECHANISM
- Publication number 20160313774
- Publication date Oct 27, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDED FUSE REPROGRAMMABILITY MECHANISM
- Publication number 20160306695
- Publication date Oct 20, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE PROGRAMMING APPARATUS AND METHOD FOR RESTORING DATA ARRA...
- Publication number 20160179692
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE DATA ARRAY POWER GATING CACHE RESTORAL PROGRAMMING MECHA...
- Publication number 20160179690
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE MICROPROCESSOR POWER GATING CACHE RESTORAL PROGRAMMING M...
- Publication number 20160179691
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE PROGRAMMING APPARATUS AND METHOD FOR RESTORING DATA ARRA...
- Publication number 20160179689
- Publication date Jun 23, 2016
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE APPARATUS AND METHOD FOR RESTORING DATA ARRAYS FOLLOWING...
- Publication number 20150338904
- Publication date Nov 26, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE DATA ARRAY POWER GATING RESTORAL MECHANISM
- Publication number 20150338905
- Publication date Nov 26, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE MICROPROCESSOR POWER GATING CACHE RESTORAL MECHANISM
- Publication number 20150339231
- Publication date Nov 26, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR REPAIRING CACHE ARRAYS IN A MULTI-CORE MIC...
- Publication number 20150339232
- Publication date Nov 26, 2015
- VIA TECHNOLOGIES, INC.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CORE-SPECIFIC FUSE MECHANISM FOR A MULTI-CORE DIE
- Publication number 20150178216
- Publication date Jun 25, 2015
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR STORAGE AND DECOMPRESSION OF CONFIGURATION...
- Publication number 20150178103
- Publication date Jun 25, 2015
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDED FUSE REPROGRAMMABILITY MECHANISM
- Publication number 20150179276
- Publication date Jun 25, 2015
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-CORE FUSE DECOMPRESSION MECHANISM
- Publication number 20150178093
- Publication date Jun 25, 2015
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EXTENDED CACHE CORRECTION
- Publication number 20150178215
- Publication date Jun 25, 2015
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE MICROPROCESSOR CONFIGURATION DATA COMPRESSION AND DECOMP...
- Publication number 20150178218
- Publication date Jun 25, 2015
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR CONFIGURABLE REDUNDANT FUSE BANKS
- Publication number 20150178196
- Publication date Jun 25, 2015
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR COMPRESSION OF CONFIGURATION DATA
- Publication number 20150169246
- Publication date Jun 18, 2015
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR RAPID FUSE BANK ACCESS IN A MULTI-CORE PRO...
- Publication number 20150170758
- Publication date Jun 18, 2015
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G11 - INFORMATION STORAGE
Information Patent Application
CORE-SPECIFIC FUSE MECHANISM FOR A MULTI-CORE DIE
- Publication number 20150058610
- Publication date Feb 26, 2015
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EXTENDED CACHE CORRECTION
- Publication number 20150058564
- Publication date Feb 26, 2015
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR CONFIGURABLE REDUNDANT FUSE BANKS
- Publication number 20150058598
- Publication date Feb 26, 2015
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXTENDED FUSE REPROGRAMMABILITY MECHANISM
- Publication number 20150055395
- Publication date Feb 26, 2015
- VIA TECHNOLOGIES, INC.
- G. Glenn Henry
- G11 - INFORMATION STORAGE
Information Patent Application
MULTI-CORE FUSE DECOMPRESSION MECHANISM
- Publication number 20150058563
- Publication date Feb 26, 2015
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR COMPRESSION OF CONFIGURATION DATA
- Publication number 20150058565
- Publication date Feb 26, 2015
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING

DINESH K. JAIN

Person

Patents Grantslast 30 patents

Extended fuse reprogrammability mechanism

Core-specific fuse mechanism for a multi-core die

Apparatus and method for configurable redundant fuse banks

Apparatus and method for storage and decompression of configuration...

Multi-core fuse decompression mechanism

Apparatus and method for extended cache correction

Multi-core data array power gating restoral mechanism

Apparatus and method for repairing cache arrays in a multi-core mic...

Multi-core apparatus and method for restoring data arrays following...

Multi-core microprocessor power gating cache restoral programming m...

Multi-core programming apparatus and method for restoring data arra...

Multi-core data array power gating cache restoral programming mecha...

Multi-core programming apparatus and method for restoring data arra...

Apparatus and method for compression of configuration data

Multi-core microprocessor power gating cache restoral mechanism

Apparatus and method for rapid fuse bank access in a multi-core pro...

Multi-core microprocessor configuration data compression and decomp...

Apparatus and method for configurable redundant fuse banks

Multi-core data array power gating restoral mechanism

Core-specific fuse mechanism for a multi-core die

Apparatus and method for extended cache correction

Multi-core fuse decompression mechanism

Apparatus and method for storage and decompression of configuration...

Extended fuse reprogrammability mechanism

Correctable configuration data compression and decompression system

Microprocessor mechanism for decompression of cache correction data

Apparatus and method for compression and decompression of microproc...

Microprocessor mechanism for decompression of fuse correction data

Microprocessor apparatus and method for securing a programmable fus...

Apparatus and method for tamper protection of a microprocessor fuse...

Patents Applicationslast 30 patents

MULTI-CORE DATA ARRAY POWER GATING RESTORAL MECHANISM

APPARATUS AND METHOD FOR CONFIGURABLE REDUNDANT FUSE BANKS

CORE-SPECIFIC FUSE MECHANISM FOR A MULTI-CORE DIE

APPARATUS AND METHOD FOR EXTENDED CACHE CORRECTION

APPARATUS AND METHOD FOR STORAGE AND DECOMPRESSION OF CONFIGURATION...

MULTI-CORE FUSE DECOMPRESSION MECHANISM

EXTENDED FUSE REPROGRAMMABILITY MECHANISM

MULTI-CORE PROGRAMMING APPARATUS AND METHOD FOR RESTORING DATA ARRA...

MULTI-CORE DATA ARRAY POWER GATING CACHE RESTORAL PROGRAMMING MECHA...

MULTI-CORE MICROPROCESSOR POWER GATING CACHE RESTORAL PROGRAMMING M...

MULTI-CORE PROGRAMMING APPARATUS AND METHOD FOR RESTORING DATA ARRA...

MULTI-CORE APPARATUS AND METHOD FOR RESTORING DATA ARRAYS FOLLOWING...

MULTI-CORE DATA ARRAY POWER GATING RESTORAL MECHANISM

MULTI-CORE MICROPROCESSOR POWER GATING CACHE RESTORAL MECHANISM

APPARATUS AND METHOD FOR REPAIRING CACHE ARRAYS IN A MULTI-CORE MIC...

CORE-SPECIFIC FUSE MECHANISM FOR A MULTI-CORE DIE

APPARATUS AND METHOD FOR STORAGE AND DECOMPRESSION OF CONFIGURATION...

EXTENDED FUSE REPROGRAMMABILITY MECHANISM

MULTI-CORE FUSE DECOMPRESSION MECHANISM

APPARATUS AND METHOD FOR EXTENDED CACHE CORRECTION

MULTI-CORE MICROPROCESSOR CONFIGURATION DATA COMPRESSION AND DECOMP...

APPARATUS AND METHOD FOR CONFIGURABLE REDUNDANT FUSE BANKS

APPARATUS AND METHOD FOR COMPRESSION OF CONFIGURATION DATA

APPARATUS AND METHOD FOR RAPID FUSE BANK ACCESS IN A MULTI-CORE PRO...

CORE-SPECIFIC FUSE MECHANISM FOR A MULTI-CORE DIE

APPARATUS AND METHOD FOR EXTENDED CACHE CORRECTION

APPARATUS AND METHOD FOR CONFIGURABLE REDUNDANT FUSE BANKS

EXTENDED FUSE REPROGRAMMABILITY MECHANISM

MULTI-CORE FUSE DECOMPRESSION MECHANISM

APPARATUS AND METHOD FOR COMPRESSION OF CONFIGURATION DATA