Ding-Dar Hu

Person

Hsinchu City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Wiring structure to minimize stress induced void formation
- Patent number 7,301,239
- Issue date Nov 27, 2007
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chien-Jung Wang
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit design for routing an electrical connection
- Patent number 7,091,614
- Issue date Aug 15, 2006
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Chia-Lin Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated defect yield management and query system
- Patent number 6,314,379
- Issue date Nov 6, 2001
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ding-Dar Hu
- G01 - MEASURING TESTING
Information Patent Grant
Method for insulating metal conductors by spin-on-glass and devices...
- Patent number 6,242,355
- Issue date Jun 5, 2001
- Taiwan Semiconductor Manufacturing Company, Ltd
- Ding Dar Hu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Advanced titanium silicide process for very narrow polysilicon lines
- Patent number 6,242,312
- Issue date Jun 5, 2001
- Taiwan Semiconductor Manufacturing Company
- Yuan-Chang Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for performing a pre-amorphization implant (PAI) which provi...
- Patent number 6,187,655
- Issue date Feb 13, 2001
- Taiwan Semiconductor Manufacturing Company
- Jiann-Jong Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Increasing capacitance for high density DRAM by microlithography pa...
- Patent number 6,020,234
- Issue date Feb 1, 2000
- Taiwan Semiconductor Manufacturing Company
- Mei-Yen Li
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Integrated circuit design for routing an electrical connection
- Publication number 20060097395
- Publication date May 11, 2006
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chia-Lin Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wiring structure to minimize stress induced void formation
- Publication number 20060019414
- Publication date Jan 26, 2006
- Chien-Jung Wang
- G01 - MEASURING TESTING
Information Patent Application
Interconnect structure for integrated circuits
- Publication number 20050082677
- Publication date Apr 21, 2005
- Su-Chen Fan
- H01 - BASIC ELECTRIC ELEMENTS

Ding-Dar Hu

Person

Patents Grantslast 30 patents

Wiring structure to minimize stress induced void formation

Integrated circuit design for routing an electrical connection

Integrated defect yield management and query system

Method for insulating metal conductors by spin-on-glass and devices...

Advanced titanium silicide process for very narrow polysilicon lines

Method for performing a pre-amorphization implant (PAI) which provi...

Increasing capacitance for high density DRAM by microlithography pa...

Patents Applicationslast 30 patents

Integrated circuit design for routing an electrical connection

Wiring structure to minimize stress induced void formation

Interconnect structure for integrated circuits