Dirk Meyer

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Elsworth, GB

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Patents Grantslast 30 patents

Information Patent Grant
Macro clock latency computation in multiple iteration clock tree sy...
- Patent number 11,321,514
- Issue date May 3, 2022
- Cadence Design Systems, Inc.
- Dirk Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating routing structure for clock network based on edge inters...
- Patent number 10,929,589
- Issue date Feb 23, 2021
- Cadence Design Systems, Inc.
- Dirk Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and methods for balanced routing tree structures
- Patent number 10,706,202
- Issue date Jul 7, 2020
- Cadence Design Systems, Inc.
- Dirk Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Irregular sink arrangement for balanced routing tree structures
- Patent number 10,643,014
- Issue date May 5, 2020
- Cadence Design Systems, Inc.
- Dirk Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for modifying a balanced clock structure
- Patent number 10,380,287
- Issue date Aug 13, 2019
- Cadence Design Systems, Inc.
- Dirk Meyer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for clock tree clustering
- Patent number 10,282,506
- Issue date May 7, 2019
- Cadence Design Systems, Inc.
- Dirk Meyer
- G06 - COMPUTING CALCULATING COUNTING