Dominique Savignac

Person

Ismaning, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Memory and method for programming memory cells
- Patent number 8,670,277
- Issue date Mar 11, 2014
- Infineon Technologies AG
- Thomas Nirschl
- G11 - INFORMATION STORAGE
Information Patent Grant
Chip, multi-chip system in a method for performing a refresh of a m...
- Patent number 8,547,767
- Issue date Oct 1, 2013
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Lithographic mask and method of forming a lithographic mask
- Patent number 8,293,431
- Issue date Oct 23, 2012
- Advanced Mask Technology Center GmbH & Co. KG
- Haiko Rolff
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Device with precharge/homogenize circuit
- Patent number 7,948,806
- Issue date May 24, 2011
- Qimonda AG
- Dominique Savignac
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device and method with a changeable substrate...
- Patent number 7,808,853
- Issue date Oct 5, 2010
- Qimonda AG
- Marc Berthel
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory dies for flexible use and method for configuring memory dies
- Patent number 7,796,446
- Issue date Sep 14, 2010
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with buried control line structures
- Patent number 7,729,154
- Issue date Jun 1, 2010
- Qimonda AG
- Dirk Baumann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit, chip stack and data processing system
- Patent number 7,698,470
- Issue date Apr 13, 2010
- Qimonda AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit and method of operating such a circuit
- Patent number 7,548,476
- Issue date Jun 16, 2009
- Qimonda AG
- Dominique Savignac
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit chip and integrated device
- Patent number 7,456,505
- Issue date Nov 25, 2008
- Infineon Technologies AG
- Minka Gospodinova
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Data memory system and method for transferring data into a data memory
- Patent number 7,428,689
- Issue date Sep 23, 2008
- Infineon Technologies AG
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory device including a signal control device and m...
- Patent number 7,404,136
- Issue date Jul 22, 2008
- Infineon Technologies AG
- Hermann Ruckerbauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor memory array with serial control/address bus
- Patent number 7,397,684
- Issue date Jul 8, 2008
- Infineon Technologies, AG
- Hermann Ruckerbauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory module with a clock signal regeneration circuit and a regist...
- Patent number 7,334,150
- Issue date Feb 19, 2008
- Infineon Technologies AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device, memory controller and memory system having bidirecti...
- Patent number 7,180,821
- Issue date Feb 20, 2007
- Infineon Technologies AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory system with two clock lines and a memory device
- Patent number 7,173,877
- Issue date Feb 6, 2007
- Infineon Technologies AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for optimizing the functioning of DRAM memory...
- Patent number 7,072,233
- Issue date Jul 4, 2006
- Infineon Technologies AG
- Ruediger Brede
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory system and method for the transfer of write an...
- Patent number 7,050,340
- Issue date May 23, 2006
- Infineon Technologies, AG
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated semiconductor circuit having transistors that are switch...
- Patent number 6,816,432
- Issue date Nov 9, 2004
- Infineon Technologies AG
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Volatile semiconductor memory and mobile device
- Patent number 6,751,145
- Issue date Jun 15, 2004
- Infineon Technologies AG
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and circuit arrangement for reading out and for storing bina...
- Patent number 6,721,219
- Issue date Apr 13, 2004
- Infineon Technologies, AG
- Athanasia Chrysostomides
- G11 - INFORMATION STORAGE
Information Patent Grant
Configuration for identifying contact faults during the testing of...
- Patent number 6,693,447
- Issue date Feb 17, 2004
- Siemens Aktiengesellschaft
- Dominique Savignac
- G01 - MEASURING TESTING
Information Patent Grant
Method for reading and storing binary memory cells signals and circ...
- Patent number 6,654,271
- Issue date Nov 25, 2003
- Infineon Technologies AG
- Karl-Peter Pfefferl
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for producing circuit structures on a semiconductor substrat...
- Patent number 6,586,308
- Issue date Jul 1, 2003
- Infineon Technologies AG
- Sabine Kling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory configuration with a central connection area
- Patent number 6,560,134
- Issue date May 6, 2003
- Infineon Technologies AG
- Martin Brox
- G11 - INFORMATION STORAGE
Information Patent Grant
Dicing configuration for separating a semiconductor component from...
- Patent number 6,528,392
- Issue date Mar 4, 2003
- Infineon Technologies AG
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating an integrated circuit, in particular an anti...
- Patent number 6,458,631
- Issue date Oct 1, 2002
- Infineon Technologies AG
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated memory having memory cells and buffer capacitors
- Patent number 6,456,522
- Issue date Sep 24, 2002
- Infineon Technologies AG
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor memory configuration with dummy components on continu...
- Patent number 6,441,469
- Issue date Aug 27, 2002
- Infineon Technologies AG
- Athanasia Chrysostomides
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor module for burn-in test configuration
- Patent number 6,426,640
- Issue date Jul 30, 2002
- Infineon Technologies AG
- Norbert Wirth
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Memory and Method for Programming Memory Cells
- Publication number 20130028026
- Publication date Jan 31, 2013
- INFINEON TECHNOLOGIES AG
- Thomas Nirschl
- G11 - INFORMATION STORAGE
Information Patent Application
Lithographic Mask and Method of Forming a Lithographic Mask
- Publication number 20100266939
- Publication date Oct 21, 2010
- Haiko Rolff
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
Memory Dies for Flexible Use and Method for Configuring Memory Dies
- Publication number 20100074038
- Publication date Mar 25, 2010
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Chip, Multi-Chip System in a Method for Performing a Refresh of a M...
- Publication number 20090268539
- Publication date Oct 29, 2009
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
DEVICE WITH PRECHARGE/HOMOGENIZE CIRCUIT
- Publication number 20090122628
- Publication date May 14, 2009
- QIMONDA AG
- Dominique Savignac
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit, Chip Stack and Data Processing System
- Publication number 20090039915
- Publication date Feb 12, 2009
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT WITH BURIED CONTROL LINE STRUCTURES
- Publication number 20080217655
- Publication date Sep 11, 2008
- QIMONDA AG
- Dirk Baumann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH A CHANGEABLE SUBSTRATE...
- Publication number 20080198676
- Publication date Aug 21, 2008
- QIMONDA AG
- Marcel Berthel
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH ALTERABLE COLUMN SELECTION TIME
- Publication number 20080002515
- Publication date Jan 3, 2008
- Helmut Schneider
- G11 - INFORMATION STORAGE
Information Patent Application
Memory module device
- Publication number 20070195505
- Publication date Aug 23, 2007
- Dominique Savignac
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF OPERATING SUCH A CIRCUIT
- Publication number 20070153601
- Publication date Jul 5, 2007
- Dominique Savignac
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory array with serial control/address bus
- Publication number 20070058408
- Publication date Mar 15, 2007
- Hermann Ruckerbauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data memory system and method for transferring data into a data memory
- Publication number 20070061671
- Publication date Mar 15, 2007
- Paul Wallner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor memory device and method of operating the same
- Publication number 20070033487
- Publication date Feb 8, 2007
- Hermann Ruckerbauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Memory Device and Method of Operating the Same
- Publication number 20070033489
- Publication date Feb 8, 2007
- Hermann RUCKERBAUER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated circuit chip and integrated device
- Publication number 20070023898
- Publication date Feb 1, 2007
- Minka Gospodinova
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory device, memory controller and method for operating the same
- Publication number 20060129740
- Publication date Jun 15, 2006
- Hermann Ruckerbauer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor memory module
- Publication number 20060123265
- Publication date Jun 8, 2006
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated memory device and memory module
- Publication number 20060112230
- Publication date May 25, 2006
- Christian Sichert
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMICONDUCTOR MEMORY SYSTEM AND METHOD FOR THE TRANSFER OF WRITE AN...
- Publication number 20060104132
- Publication date May 18, 2006
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device, memory controller and memory system having bidirecti...
- Publication number 20060067156
- Publication date Mar 30, 2006
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Memory system with two clock lines and a memory device
- Publication number 20060067157
- Publication date Mar 30, 2006
- Hermann Ruckerbauer
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for optimizing the functioning of DRAM memory...
- Publication number 20050002245
- Publication date Jan 6, 2005
- Ruediger Brede
- G11 - INFORMATION STORAGE
Information Patent Application
Volatile semiconductor memory and mobile device
- Publication number 20030043674
- Publication date Mar 6, 2003
- Robert Feurle
- G11 - INFORMATION STORAGE
Information Patent Application
Method and circuit arrangement for reading out and for storing bina...
- Publication number 20030012061
- Publication date Jan 16, 2003
- Athanasia Chrysostomides
- G11 - INFORMATION STORAGE
Information Patent Application
Method for reading and storing binary memory cell signals and circu...
- Publication number 20030007392
- Publication date Jan 9, 2003
- Karl-Peter Pfefferl
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated semiconductor circuit having transistors that are switch...
- Publication number 20020172071
- Publication date Nov 21, 2002
- Robert Feurle
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING AN INTEGRATED CIRCUIT, IN PARTICULAR AN ANTI...
- Publication number 20020155678
- Publication date Oct 24, 2002
- Axel Brintzinger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Memory configuration with a central connection area
- Publication number 20020062430
- Publication date May 23, 2002
- Martin Brox
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for producing circuit structures on a semiconductor substrat...
- Publication number 20020061614
- Publication date May 23, 2002
- Sabine Kling
- H01 - BASIC ELECTRIC ELEMENTS

Dominique Savignac

Person

Patents Grantslast 30 patents

Memory and method for programming memory cells

Chip, multi-chip system in a method for performing a refresh of a m...

Lithographic mask and method of forming a lithographic mask

Device with precharge/homogenize circuit

Semiconductor memory device and method with a changeable substrate...

Memory dies for flexible use and method for configuring memory dies

Integrated circuit with buried control line structures

Integrated circuit, chip stack and data processing system

Integrated circuit and method of operating such a circuit

Integrated circuit chip and integrated device

Data memory system and method for transferring data into a data memory

Semiconductor memory device including a signal control device and m...

Semiconductor memory array with serial control/address bus

Memory module with a clock signal regeneration circuit and a regist...

Memory device, memory controller and memory system having bidirecti...

Memory system with two clock lines and a memory device

Method and apparatus for optimizing the functioning of DRAM memory...

Semiconductor memory system and method for the transfer of write an...

Integrated semiconductor circuit having transistors that are switch...

Volatile semiconductor memory and mobile device

Method and circuit arrangement for reading out and for storing bina...

Configuration for identifying contact faults during the testing of...

Method for reading and storing binary memory cells signals and circ...

Method for producing circuit structures on a semiconductor substrat...

Memory configuration with a central connection area

Dicing configuration for separating a semiconductor component from...

Method for fabricating an integrated circuit, in particular an anti...

Integrated memory having memory cells and buffer capacitors

Semiconductor memory configuration with dummy components on continu...

Semiconductor module for burn-in test configuration

Patents Applicationslast 30 patents

Memory and Method for Programming Memory Cells

Lithographic Mask and Method of Forming a Lithographic Mask

Memory Dies for Flexible Use and Method for Configuring Memory Dies

Chip, Multi-Chip System in a Method for Performing a Refresh of a M...

DEVICE WITH PRECHARGE/HOMOGENIZE CIRCUIT

Integrated Circuit, Chip Stack and Data Processing System

INTEGRATED CIRCUIT WITH BURIED CONTROL LINE STRUCTURES

SEMICONDUCTOR MEMORY DEVICE AND METHOD WITH A CHANGEABLE SUBSTRATE...

MEMORY WITH ALTERABLE COLUMN SELECTION TIME

Memory module device

INTEGRATED CIRCUIT AND METHOD OF OPERATING SUCH A CIRCUIT

Semiconductor memory array with serial control/address bus

Data memory system and method for transferring data into a data memory

Semiconductor memory device and method of operating the same

Semiconductor Memory Device and Method of Operating the Same

Integrated circuit chip and integrated device

Memory device, memory controller and method for operating the same

Semiconductor memory module

Integrated memory device and memory module

SEMICONDUCTOR MEMORY SYSTEM AND METHOD FOR THE TRANSFER OF WRITE AN...

Memory device, memory controller and memory system having bidirecti...

Memory system with two clock lines and a memory device

Method and apparatus for optimizing the functioning of DRAM memory...

Volatile semiconductor memory and mobile device

Method and circuit arrangement for reading out and for storing bina...

Method for reading and storing binary memory cell signals and circu...

Integrated semiconductor circuit having transistors that are switch...

METHOD FOR FABRICATING AN INTEGRATED CIRCUIT, IN PARTICULAR AN ANTI...

Memory configuration with a central connection area

Method for producing circuit structures on a semiconductor substrat...