Donald B. Bennett

Person

Apple Valley, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Single-type fabric card networks and method of implementing same
- Patent number 6,212,179
- Issue date Apr 3, 2001
- Lockheed Martin Corporation
- Steven Allen Murphy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Initialization of switching networks for use with a scalable cohere...
- Patent number 5,826,028
- Issue date Oct 20, 1998
- Lockheed Martin Corporation
- Donald Bruce Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recirculation routes in switching networks used with scalable coher...
- Patent number 5,799,015
- Issue date Aug 25, 1998
- Lockheed Martin Corporation
- Donald Bruce Bennett
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Detection of lost packets in switching networks used with scalable...
- Patent number 5,790,524
- Issue date Aug 4, 1998
- Lockheed Martin Corporation
- Donald Bruce Bennett
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Identification of new and stale packets in switching networks used...
- Patent number 5,787,082
- Issue date Jul 28, 1998
- Lockheed Martin Corporation
- Donald Bruce Bennett
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Allocation of node transmissions in switching networks used with sc...
- Patent number 5,787,081
- Issue date Jul 28, 1998
- Lockheed Martin Corporation
- Donald Bruce Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for residual error clock skew bound, and clock...
- Patent number 5,550,875
- Issue date Aug 27, 1996
- Unisys Corporation
- Donald B. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tightly coupled scientific processing system
- Patent number 4,945,479
- Issue date Jul 31, 1990
- Unisys Corporation
- John T. Rusterholz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Layered network
- Patent number 4,833,468
- Issue date May 23, 1989
- Unisys Corporation
- Brian R. Larson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus error detection employing parity verification
- Patent number 4,825,438
- Issue date Apr 25, 1989
- Unisys Corporation
- Donald B. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Versatile interconnection bus
- Patent number 4,734,909
- Issue date Mar 29, 1988
- Sperry Corporation
- Donald B. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital adaptive voting
- Patent number 4,723,242
- Issue date Feb 2, 1988
- Sperry Corporation
- Brian R. Larson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reflexive utilization of descriptors to reconstitute computer instr...
- Patent number 4,506,325
- Issue date Mar 19, 1985
- Sperry Corporation
- Donald B. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
VLSI Wired-OR driver/receiver circuit
- Patent number 4,500,988
- Issue date Feb 19, 1985
- Sperry Corporation
- Donald B. Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual address translator
- Patent number 4,096,568
- Issue date Jun 20, 1978
- Sperry Rand Corporation
- Donald Bruce Bennett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual address translator
- Patent number 4,084,225
- Issue date Apr 11, 1978
- Sperry Rand Corporation
- Larry Don Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual address translator
- Patent number 4,084,227
- Issue date Apr 11, 1978
- Sperry Rand Corporation
- Donald Bruce Bennett
- G06 - COMPUTING CALCULATING COUNTING

Donald B. Bennett

Person

Patents Grantslast 30 patents

Single-type fabric card networks and method of implementing same

Initialization of switching networks for use with a scalable cohere...

Recirculation routes in switching networks used with scalable coher...

Detection of lost packets in switching networks used with scalable...

Identification of new and stale packets in switching networks used...

Allocation of node transmissions in switching networks used with sc...

Apparatus and method for residual error clock skew bound, and clock...

Tightly coupled scientific processing system

Layered network

Bus error detection employing parity verification

Versatile interconnection bus

Digital adaptive voting

Reflexive utilization of descriptors to reconstitute computer instr...

VLSI Wired-OR driver/receiver circuit

Virtual address translator

Virtual address translator

Virtual address translator