Donghyuk Lee

Person

Cedar Park, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Techniques for performing matrix computations using hierarchical re...
- Patent number 12,211,080
- Issue date Jan 28, 2025
- NVIDIA Corporation
- Hanrui Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for accelerating matrix multiplication computations usin...
- Patent number 12,141,229
- Issue date Nov 12, 2024
- NVIDIA Corporation
- Hanrui Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory page access instrumentation
- Patent number 12,141,451
- Issue date Nov 12, 2024
- NVIDIA Corporation
- Niladrish Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined on-package and off-package memory system
- Patent number 12,001,725
- Issue date Jun 4, 2024
- NVIDIA Corporation
- Niladrish Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing coupling and power noise on PAM-4 I/O interface
- Patent number 11,966,348
- Issue date Apr 23, 2024
- NVIDIA Corp.
- Donghyuk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined on-package and off-package memory system
- Patent number 11,789,649
- Issue date Oct 17, 2023
- NVIDIA Corporation
- Niladrish Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for generating and processing hierarchical representatio...
- Patent number 11,709,812
- Issue date Jul 25, 2023
- NVIDIA Corporation
- Hanrui Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data bus inversion (DBI) on pulse amplitude modulation (PAM) and re...
- Patent number 11,159,153
- Issue date Oct 26, 2021
- NVIDIA Corp.
- Donghyuk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Relaxed 433 encoding to reduce coupling and power noise on PAM-4 da...
- Patent number 10,657,094
- Issue date May 19, 2020
- NVIDIA Corp.
- Donghyuk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
424 encoding schemes to reduce coupling and power noise on PAM-4 da...
- Patent number 10,599,606
- Issue date Mar 24, 2020
- NVIDIA Corp.
- Donghyuk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unrelaxed 433 encoding to reduce coupling and power noise on PAM-4...
- Patent number 10,491,435
- Issue date Nov 26, 2019
- NVIDIA Corp.
- Donghyuk Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
TECHNIQUES FOR PERFORMING MATRIX COMPUTATIONS USING HIERARCHICAL RE...
- Publication number 20250037186
- Publication date Jan 30, 2025
- NVIDIA Corporation
- Hanrui WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTATION OFFLOAD REQUESTS WITH DENIAL RESPONSE
- Publication number 20240281300
- Publication date Aug 22, 2024
- NVIDIA Corporation
- Donghyuk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY PAGE ACCESS INSTRUMENTATION
- Publication number 20240256153
- Publication date Aug 1, 2024
- NVIDIA Corporation
- Niladrish Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED ON-PACKAGE AND OFF-PACKAGE MEMORY SYSTEM
- Publication number 20230393788
- Publication date Dec 7, 2023
- NVIDIA Corporation
- Nilandrish Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY INTERFACE WITH REDUCED ENERGY TRANSMIT MODE
- Publication number 20230043152
- Publication date Feb 9, 2023
- NVIDIA Corp.
- James Michael O'Connor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR PERFORMING MATRIX COMPUTATIONS USING HIERARCHICAL RE...
- Publication number 20220374961
- Publication date Nov 24, 2022
- NVIDIA Corporation
- Hanrui WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR GENERATING AND PROCESSING HIERARCHICAL REPRESENTATIO...
- Publication number 20220374403
- Publication date Nov 24, 2022
- NVIDIA Corporation
- Hanrui WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR ACCELERATING MATRIX MULTIPLICATION COMPUTATIONS USIN...
- Publication number 20220374496
- Publication date Nov 24, 2022
- NVIDIA Corporation
- Hanrui WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED ON-PACKAGE AND OFF-PACKAGE MEMORY SYSTEM
- Publication number 20220342595
- Publication date Oct 27, 2022
- NVIDIA Corporation
- Niladrish Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING COUPLING AND POWER NOISE ON PAM-4 I/O INTERFACE
- Publication number 20200242062
- Publication date Jul 30, 2020
- NVIDIA Corp.
- Donghyuk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RELAXED 433 ENCODING TO REDUCE COUPLING AND POWER NOISE ON PAM-4 DA...
- Publication number 20190303339
- Publication date Oct 3, 2019
- NVIDIA Corp.
- Donghyuk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
424 ENCODING SCHEMES TO REDUCE COUPLING AND POWER NOISE ON PAM-4 DA...
- Publication number 20190303340
- Publication date Oct 3, 2019
- NVIDIA Corp.
- Donghyuk Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UNRELAXED 433 ENCODING TO REDUCE COUPLING AND POWER NOISE ON PAM-4...
- Publication number 20190305995
- Publication date Oct 3, 2019
- NVIDIA Corp.
- Donghyuk Lee
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA BUS INVERSION (DBI) ON PULSE AMPLITUDE MODULATION (PAM) AND RE...
- Publication number 20190305765
- Publication date Oct 3, 2019
- NVIDIA Corp.
- Donghyuk Lee
- G06 - COMPUTING CALCULATING COUNTING

Donghyuk Lee

Person

Patents Grantslast 30 patents

Techniques for performing matrix computations using hierarchical re...

Techniques for accelerating matrix multiplication computations usin...

Memory page access instrumentation

Combined on-package and off-package memory system

Reducing coupling and power noise on PAM-4 I/O interface

Combined on-package and off-package memory system

Techniques for generating and processing hierarchical representatio...

Data bus inversion (DBI) on pulse amplitude modulation (PAM) and re...

Relaxed 433 encoding to reduce coupling and power noise on PAM-4 da...

424 encoding schemes to reduce coupling and power noise on PAM-4 da...

Unrelaxed 433 encoding to reduce coupling and power noise on PAM-4...

Patents Applicationslast 30 patents

TECHNIQUES FOR PERFORMING MATRIX COMPUTATIONS USING HIERARCHICAL RE...

COMPUTATION OFFLOAD REQUESTS WITH DENIAL RESPONSE

MEMORY PAGE ACCESS INSTRUMENTATION

COMBINED ON-PACKAGE AND OFF-PACKAGE MEMORY SYSTEM

MEMORY INTERFACE WITH REDUCED ENERGY TRANSMIT MODE

TECHNIQUES FOR PERFORMING MATRIX COMPUTATIONS USING HIERARCHICAL RE...

TECHNIQUES FOR GENERATING AND PROCESSING HIERARCHICAL REPRESENTATIO...

TECHNIQUES FOR ACCELERATING MATRIX MULTIPLICATION COMPUTATIONS USIN...

COMBINED ON-PACKAGE AND OFF-PACKAGE MEMORY SYSTEM

REDUCING COUPLING AND POWER NOISE ON PAM-4 I/O INTERFACE

RELAXED 433 ENCODING TO REDUCE COUPLING AND POWER NOISE ON PAM-4 DA...

424 ENCODING SCHEMES TO REDUCE COUPLING AND POWER NOISE ON PAM-4 DA...

UNRELAXED 433 ENCODING TO REDUCE COUPLING AND POWER NOISE ON PAM-4...

DATA BUS INVERSION (DBI) ON PULSE AMPLITUDE MODULATION (PAM) AND RE...