DongSoo Moon

Person

Ichon-si, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming POP with stacked semicon...
- Patent number 9,324,659
- Issue date Apr 26, 2016
- STATS ChipPAC, Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with vertical interconnection a...
- Patent number 9,093,392
- Issue date Jul 28, 2015
- Stats Chippac Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with bump formed on substrate to prevent ELK I...
- Patent number 8,884,339
- Issue date Nov 11, 2014
- STATS ChipPAC, Ltd.
- KiYoun Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming mold underfill using dis...
- Patent number 8,785,251
- Issue date Jul 22, 2014
- STATS ChipPAC, Ltd.
- SooMoon Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with thermal dispersal structur...
- Patent number 8,692,365
- Issue date Apr 8, 2014
- Stats Chippac Ltd.
- DongSoo Moon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system employing multi-package module te...
- Patent number 8,609,463
- Issue date Dec 17, 2013
- Stats Chippac Ltd.
- WonJun Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming mold underfill using dis...
- Patent number 8,569,895
- Issue date Oct 29, 2013
- STATS ChipPAC, Ltd.
- SooMoon Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device including bump formed on substrate to prevent...
- Patent number 8,519,536
- Issue date Aug 27, 2013
- STATS ChipPAC, Ltd.
- KiYoun Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with routable underlayer and me...
- Patent number 8,513,057
- Issue date Aug 20, 2013
- Stats Chippac Ltd.
- Oh Han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor method of forming bump on substrate to prevent ELK IL...
- Patent number 8,367,467
- Issue date Feb 5, 2013
- STATS ChipPAC, Ltd.
- KiYoun Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with lead frame and method of m...
- Patent number 8,211,746
- Issue date Jul 3, 2012
- Stats Chippac Ltd.
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming mold underfill using dis...
- Patent number 8,193,036
- Issue date Jun 5, 2012
- STATS ChipPAC, Ltd.
- SooMoon Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with interconnect and method of...
- Patent number 8,115,293
- Issue date Feb 14, 2012
- Stats Chippac Ltd.
- DongSoo Moon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package on package system
- Patent number 7,968,373
- Issue date Jun 28, 2011
- Stats Chippac Ltd.
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with lead frame and method of m...
- Patent number 7,951,643
- Issue date May 31, 2011
- Stats Chippac Ltd.
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system for stackable devices
- Patent number 7,919,871
- Issue date Apr 5, 2011
- Stats Chippac Ltd.
- DongSoo Moon
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming Mold Underfill Using Dis...
- Publication number 20140004659
- Publication date Jan 2, 2014
- STATS ChipPAC, Ltd.
- SooMoon Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Bump on Substrate to Pre...
- Publication number 20130264705
- Publication date Oct 10, 2013
- KiYoun Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Bump on Substrate to Pre...
- Publication number 20130087913
- Publication date Apr 11, 2013
- STATS ChipPAC, Ltd.
- KiYoun Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE UNDERLAYER AND ME...
- Publication number 20130069224
- Publication date Mar 21, 2013
- Oh Han Kim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming POP With Stacked Semicon...
- Publication number 20130032952
- Publication date Feb 7, 2013
- STATS ChipPAC, Ltd.
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THERMAL DISPERSAL STRUCTUR...
- Publication number 20120319267
- Publication date Dec 20, 2012
- DongSoo Moon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Mold Underfill Using Dis...
- Publication number 20120211904
- Publication date Aug 23, 2012
- STATS ChipPAC, Ltd.
- SooMoon Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VERTICAL INTERCONNECTION A...
- Publication number 20120146229
- Publication date Jun 14, 2012
- SungWon Cho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Mold Underfill Using Dis...
- Publication number 20120061858
- Publication date Mar 15, 2012
- STATS ChipPAC, Ltd.
- SooMoon Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Bump on Substrate to Pre...
- Publication number 20110260316
- Publication date Oct 27, 2011
- STATS ChipPAC, Ltd.
- KiYoun Jang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...
- Publication number 20110227206
- Publication date Sep 22, 2011
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF...
- Publication number 20110133325
- Publication date Jun 9, 2011
- DongSoo Moon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH POST TYPE INTERCONNECTOR A...
- Publication number 20100244212
- Publication date Sep 30, 2010
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...
- Publication number 20100133665
- Publication date Jun 3, 2010
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM
- Publication number 20090273094
- Publication date Nov 5, 2009
- Jong-Woo Ha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES
- Publication number 20090236753
- Publication date Sep 24, 2009
- DongSoo Moon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MULTI-PACKAGE MODULE TE...
- Publication number 20080227238
- Publication date Sep 18, 2008
- WonJun Ko
- H01 - BASIC ELECTRIC ELEMENTS

DongSoo Moon

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming POP with stacked semicon...

Integrated circuit packaging system with vertical interconnection a...

Semiconductor device with bump formed on substrate to prevent ELK I...

Semiconductor device and method of forming mold underfill using dis...

Integrated circuit packaging system with thermal dispersal structur...

Integrated circuit package system employing multi-package module te...

Semiconductor device and method of forming mold underfill using dis...

Semiconductor device including bump formed on substrate to prevent...

Integrated circuit packaging system with routable underlayer and me...

Semiconductor method of forming bump on substrate to prevent ELK IL...

Integrated circuit packaging system with lead frame and method of m...

Semiconductor device and method of forming mold underfill using dis...

Integrated circuit packaging system with interconnect and method of...

Integrated circuit package on package system

Integrated circuit packaging system with lead frame and method of m...

Integrated circuit package system for stackable devices

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming Mold Underfill Using Dis...

Semiconductor Device and Method of Forming Bump on Substrate to Pre...

Semiconductor Device and Method of Forming Bump on Substrate to Pre...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ROUTABLE UNDERLAYER AND ME...

Semiconductor Device and Method of Forming POP With Stacked Semicon...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH THERMAL DISPERSAL STRUCTUR...

Semiconductor Device and Method of Forming Mold Underfill Using Dis...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH VERTICAL INTERCONNECTION A...

Semiconductor Device and Method of Forming Mold Underfill Using Dis...

Semiconductor Device and Method of Forming Bump on Substrate to Pre...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH INTERCONNECT AND METHOD OF...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH POST TYPE INTERCONNECTOR A...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH LEAD FRAME AND METHOD OF M...

INTEGRATED CIRCUIT PACKAGE ON PACKAGE SYSTEM

INTEGRATED CIRCUIT PACKAGE SYSTEM FOR STACKABLE DEVICES

INTEGRATED CIRCUIT PACKAGE SYSTEM EMPLOYING MULTI-PACKAGE MODULE TE...