Dongzi Liu

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Multi-instantiated block timing optimization
- Patent number 9,652,582
- Issue date May 16, 2017
- Cadence Design Systems, Inc.
- Dongzi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for master-clone optimization during circuit a...
- Patent number 9,639,644
- Issue date May 2, 2017
- Cadence Design Systems, Inc.
- Dongzi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods, systems, and articles of manufacture for implementing full...
- Patent number 9,141,740
- Issue date Sep 22, 2015
- Cadence Design Systems, Inc.
- Dongzi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reverse interface logic model for optimizing physical hierarchy und...
- Patent number 9,026,978
- Issue date May 5, 2015
- Cadence Design Systems, Inc.
- Dongzi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for implementing timing analysis and optimization...
- Patent number 7,930,675
- Issue date Apr 19, 2011
- Cadence Design Systems, Inc.
- Oleg Levitsky
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS, SYSTEMS, AND ARTICLES OF MANUFACTURE FOR IMPLEMENTING FULL...
- Publication number 20120254818
- Publication date Oct 4, 2012
- Cadence Design Systems, Inc.
- Dongzi Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR IMPLEMENTING TIMING ANALYSIS AND OPTIMIZATION...
- Publication number 20090172619
- Publication date Jul 2, 2009
- Cadence Design Systems, Inc.
- Oleg Levitsky
- G06 - COMPUTING CALCULATING COUNTING