Douglas Brisbin

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for reducing plasma process induced damage in...
- Patent number 8,471,369
- Issue date Jun 25, 2013
- National Semiconductor Corporation
- Heather McCulloh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for designing and manufacturing a PMOS device with drain jun...
- Patent number 8,086,979
- Issue date Dec 27, 2011
- National Semiconductor Corp.
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of monitoring process misalignment to reduce asymmetric devi...
- Patent number 7,718,448
- Issue date May 18, 2010
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS transistor and method of forming the MOS transistor with a SiON...
- Patent number 7,645,657
- Issue date Jan 12, 2010
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for designing and manufacturing a PMOS device with drain jun...
- Patent number 7,560,348
- Issue date Jul 14, 2009
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-source, multi-gate MOS transistor with a drain region that is...
- Patent number 7,214,992
- Issue date May 8, 2007
- National Semiconductor Corporation
- Andy Strachan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PMOS device with drain junction breakdown point located for reduced...
- Patent number 7,180,140
- Issue date Feb 20, 2007
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
LDMOS transistor structure for improving hot carrier reliability
- Patent number 6,946,706
- Issue date Sep 20, 2005
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and device for improving hot carrier reliability of an LDMOS...
- Patent number 6,727,547
- Issue date Apr 27, 2004
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power MOSFET cell with a crossed bar shaped body contact area
- Patent number 6,566,710
- Issue date May 20, 2003
- National Semiconductor Corporation
- Andy Strachan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
LDMOS transistor structure using a drain ring with a checkerboard p...
- Patent number 6,548,839
- Issue date Apr 15, 2003
- National Semiconductor Corporation
- Andrew Strachan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method for Designing and Manufacturing a PMOS Device with Drain Jun...
- Publication number 20090254872
- Publication date Oct 8, 2009
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOS transistor and method of forming the MOS transistor with a SiON...
- Publication number 20090146192
- Publication date Jun 11, 2009
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for designing and manufacturing a PMOS device with drain jun...
- Publication number 20070264768
- Publication date Nov 15, 2007
- National Semiconductor Corporation
- Douglas Brisbin
- H01 - BASIC ELECTRIC ELEMENTS

Douglas Brisbin

Person

Patents Grantslast 30 patents

Method and apparatus for reducing plasma process induced damage in...

Method for designing and manufacturing a PMOS device with drain jun...

Method of monitoring process misalignment to reduce asymmetric devi...

MOS transistor and method of forming the MOS transistor with a SiON...

Method for designing and manufacturing a PMOS device with drain jun...

Multi-source, multi-gate MOS transistor with a drain region that is...

PMOS device with drain junction breakdown point located for reduced...

LDMOS transistor structure for improving hot carrier reliability

Method and device for improving hot carrier reliability of an LDMOS...

Power MOSFET cell with a crossed bar shaped body contact area

LDMOS transistor structure using a drain ring with a checkerboard p...

Patents Applicationslast 30 patents

Method for Designing and Manufacturing a PMOS Device with Drain Jun...

MOS transistor and method of forming the MOS transistor with a SiON...

Method for designing and manufacturing a PMOS device with drain jun...