Douglas C. LaTulipe, JR.

Person

Guilderland, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor structure having a contact-level air gap within the i...
- Patent number 8,232,618
- Issue date Jul 31, 2012
- International Business Machines Corporation
- Gregory Breyta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of creating an extremely thin semiconductor-on-insulator (ET...
- Patent number 8,124,427
- Issue date Feb 28, 2012
- International Business Machines Corporation
- Nathaniel C. Berliner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating ultra-deep vias and three-dimensional integra...
- Patent number 7,955,967
- Issue date Jun 7, 2011
- International Business Machines Corporation
- Douglas C. La Tulipe, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method, system, program product for bonding two circuitry-including...
- Patent number 7,875,528
- Issue date Jan 25, 2011
- International Business Machines Corporation
- Douglas C. La Tulipe, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating ultra-deep vias and three-dimensional integra...
- Patent number 7,723,851
- Issue date May 25, 2010
- International Business Machines Corporation
- Douglas C. La Tulipe, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating ultra-deep vias and three-dimensional integra...
- Patent number 7,704,869
- Issue date Apr 27, 2010
- International Business Machines Corporation
- Douglas C. La Tulipe, Jr.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming wiring to transistor and related transistor
- Patent number 7,666,723
- Issue date Feb 23, 2010
- International Business Machines Corporation
- David J. Frank
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low-cost strained SOI substrate for high-performance CMOS technology
- Patent number 7,528,056
- Issue date May 5, 2009
- International Business Machines Corporation
- Meikei Ieong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back end interconnect with a shaped interface
- Patent number 7,494,915
- Issue date Feb 24, 2009
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for preparing 2-dimensional semiconductor devices for integr...
- Patent number 7,488,630
- Issue date Feb 10, 2009
- International Business Machines Corporation
- David J. Frank
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for depositing a metal layer on a semiconductor interconnect...
- Patent number 7,241,696
- Issue date Jul 10, 2007
- International Business Machines Corporation
- Larry Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back end interconnect with a shaped interface
- Patent number 7,122,462
- Issue date Oct 17, 2006
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Crystallographic modification of hard mask properties
- Patent number 7,001,835
- Issue date Feb 21, 2006
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD OF FABRICATION OF A THREE-DIMENSIONAL INTEGRATED CIRCUIT DEV...
- Publication number 20120302040
- Publication date Nov 29, 2012
- International Business Machines Corporation
- DOUGLAS C. LA TULIPE, JR.
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
APPARATUS FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVICE FABRICATI...
- Publication number 20120299145
- Publication date Nov 29, 2012
- International Business Machines Corporation
- DOUGLAS C. LA TULIPE, JR.
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
NON-RELAXED EMBEDDED STRESSORS WITH SOLID SOURCE EXTENSION REGIONS...
- Publication number 20120302019
- Publication date Nov 29, 2012
- International Business Machines Corporation
- Kangguo Cheng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Epitaxially Grown Extension Regions for Scaled CMOS Devices
- Publication number 20120205716
- Publication date Aug 16, 2012
- International Business Machines Corporation
- Thomas N. Adam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEALED AIR GAP FOR SEMICONDUCTOR CHIP
- Publication number 20120199886
- Publication date Aug 9, 2012
- International Business Machines Corporation
- David V. Horak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF CREATING AN EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ET...
- Publication number 20120125538
- Publication date May 24, 2012
- International Business Machines Corporation
- Nathaniel C. BERLINER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEALED AIR GAP FOR SEMICONDUCTOR CHIP
- Publication number 20120104512
- Publication date May 3, 2012
- International Business Machines Corporation
- David V. Horak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE HAVING A CONTACT-LEVEL AIR GAP WITHIN THE I...
- Publication number 20120037962
- Publication date Feb 16, 2012
- International Business Machines Corporation
- Gregory Breyta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING ULTRA-DEEP VIAS AND THREE-DIMENSIONAL INTEGRA...
- Publication number 20110147939
- Publication date Jun 23, 2011
- International Business Machines Corporation
- Douglas C. La Tulipe, JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF CREATING AN EXTREMELY THIN SEMICONDUCTOR-ON- INSULATOR (E...
- Publication number 20110097824
- Publication date Apr 28, 2011
- International Business Machines Corporation
- Nathaniel C. BERLINER
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING ULTRA-DEEP VIAS AND THREE-DIMENSIONAL INTEGRA...
- Publication number 20110097870
- Publication date Apr 28, 2011
- International Business Machines Corporation
- Douglas C. La Tulipe, JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING WIRING TO TRANSISTOR AND RELATED TRANSISTOR
- Publication number 20100133616
- Publication date Jun 3, 2010
- David J. Frank
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER SCALE MEMBRANE FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVIC...
- Publication number 20100006972
- Publication date Jan 14, 2010
- International Business Machines Corporation
- DOUGLAS C. LA TULIPE, JR.
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
METHOD OF FABRICATING ULTRA-DEEP VIAS AND THREE-DIMENSIONAL INTEGRA...
- Publication number 20090068835
- Publication date Mar 12, 2009
- Douglas C. La Tulipe, JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING ULTRA-DEEP VIAS AND THREE-DIMENSIONAL INTEGRA...
- Publication number 20090065941
- Publication date Mar 12, 2009
- Douglas C. La Tulipe, JR.
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Back End Interconnect With a Shaped Interface
- Publication number 20050112864
- Publication date May 26, 2005
- International Business Machines Corporation
- Lawrence A. Clevenger
- H01 - BASIC ELECTRIC ELEMENTS

Douglas C. LaTulipe, JR.

Person

Patents Grantslast 30 patents

Semiconductor structure having a contact-level air gap within the i...

Method of creating an extremely thin semiconductor-on-insulator (ET...

Method of fabricating ultra-deep vias and three-dimensional integra...

Method, system, program product for bonding two circuitry-including...

Method of fabricating ultra-deep vias and three-dimensional integra...

Method of fabricating ultra-deep vias and three-dimensional integra...

Methods of forming wiring to transistor and related transistor

Low-cost strained SOI substrate for high-performance CMOS technology

Back end interconnect with a shaped interface

Method for preparing 2-dimensional semiconductor devices for integr...

Method for depositing a metal layer on a semiconductor interconnect...

Back end interconnect with a shaped interface

Crystallographic modification of hard mask properties

Patents Applicationslast 30 patents

METHOD OF FABRICATION OF A THREE-DIMENSIONAL INTEGRATED CIRCUIT DEV...

APPARATUS FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVICE FABRICATI...

NON-RELAXED EMBEDDED STRESSORS WITH SOLID SOURCE EXTENSION REGIONS...

Epitaxially Grown Extension Regions for Scaled CMOS Devices

SEALED AIR GAP FOR SEMICONDUCTOR CHIP

METHOD OF CREATING AN EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR (ET...

SEALED AIR GAP FOR SEMICONDUCTOR CHIP

SEMICONDUCTOR STRUCTURE HAVING A CONTACT-LEVEL AIR GAP WITHIN THE I...

METHOD OF FABRICATING ULTRA-DEEP VIAS AND THREE-DIMENSIONAL INTEGRA...

METHOD OF CREATING AN EXTREMELY THIN SEMICONDUCTOR-ON- INSULATOR (E...

METHOD OF FABRICATING ULTRA-DEEP VIAS AND THREE-DIMENSIONAL INTEGRA...

METHODS OF FORMING WIRING TO TRANSISTOR AND RELATED TRANSISTOR

WAFER SCALE MEMBRANE FOR THREE-DIMENSIONAL INTEGRATED CIRCUIT DEVIC...

METHOD OF FABRICATING ULTRA-DEEP VIAS AND THREE-DIMENSIONAL INTEGRA...

METHOD OF FABRICATING ULTRA-DEEP VIAS AND THREE-DIMENSIONAL INTEGRA...

Back End Interconnect With a Shaped Interface