Douglas E. Sprague

Person

Ellsworth, ME, US

People

Patents Grantslast 30 patents

Information Patent Grant
Auto test grouping/clock sequencing for at-speed test
- Patent number 10,436,837
- Issue date Oct 8, 2019
- GLOBALFOUNDRIES Inc.
- Hardik P. Bhagat
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus for capturing results of memory testing
- Patent number 9,286,181
- Issue date Mar 15, 2016
- GLOBALFOUNDRIES Inc.
- Craig M. Monroe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method with system and program product for prioritizing clock domai...
- Patent number 9,194,916
- Issue date Nov 24, 2015
- GLOBALFOUNDRIES Inc.
- Douglas E. Sprague
- G01 - MEASURING TESTING
Information Patent Grant
Built-in-self-test (BIST) organizational file generation
- Patent number 8,661,399
- Issue date Feb 25, 2014
- International Business Machines Corporation
- Craig M. Monroe
- G11 - INFORMATION STORAGE
Information Patent Grant
Validating interconnections between logic blocks in a circuit descr...
- Patent number 8,595,678
- Issue date Nov 26, 2013
- International Business Machines Corporation
- Craig M. Monroe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock edge grouping for at-speed test
- Patent number 8,538,718
- Issue date Sep 17, 2013
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING
Information Patent Grant
Data structure for describing MBIST architecture
- Patent number 8,239,818
- Issue date Aug 7, 2012
- International Business Machines Corporation
- Craig M. Monroe
- G11 - INFORMATION STORAGE
Information Patent Grant
Automated multi-device test process and system
- Patent number 6,868,513
- Issue date Mar 15, 2005
- International Business Machines Corporation
- Sally S. Botala
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
AUTO TEST GROUPING/CLOCK SEQUENCING FOR AT-SPEED TEST
- Publication number 20170108549
- Publication date Apr 20, 2017
- GLOBALFOUNDRIES INC.
- Hardik P. BHAGAT
- G01 - MEASURING TESTING
Information Patent Application
METHOD WITH SYSTEM AND PROGRAM PRODUCT FOR PRIORITIZING CLOCK DOMAI...
- Publication number 20150185286
- Publication date Jul 2, 2015
- International Business Machines Corporation
- Douglas E. Sprague
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS FOR CAPTURING RESULTS OF MEMORY TESTING
- Publication number 20150039950
- Publication date Feb 5, 2015
- International Business Machines Corporation
- Craig M. Monroe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUILT-IN-SELF-TEST (BIST) ORGANIZATIONAL FILE GENERATION
- Publication number 20140040685
- Publication date Feb 6, 2014
- International Business Machines Corporation
- Craig M. Monroe
- G11 - INFORMATION STORAGE
Information Patent Application
VALIDATING INTERCONNECTIONS BETWEEN LOGIC BLOCKS IN A CIRCUIT DESCR...
- Publication number 20130205268
- Publication date Aug 8, 2013
- International Business Machines Corporation
- Craig M. Monroe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CLOCK EDGE GROUPING FOR AT-SPEED TEST
- Publication number 20120150473
- Publication date Jun 14, 2012
- International Business Machines Corporation
- Gary D. Grise
- G01 - MEASURING TESTING

Douglas E. Sprague

Person

Patents Grantslast 30 patents

Auto test grouping/clock sequencing for at-speed test

Apparatus for capturing results of memory testing

Method with system and program product for prioritizing clock domai...

Built-in-self-test (BIST) organizational file generation

Validating interconnections between logic blocks in a circuit descr...

Clock edge grouping for at-speed test

Data structure for describing MBIST architecture

Automated multi-device test process and system

Patents Applicationslast 30 patents

AUTO TEST GROUPING/CLOCK SEQUENCING FOR AT-SPEED TEST

METHOD WITH SYSTEM AND PROGRAM PRODUCT FOR PRIORITIZING CLOCK DOMAI...

APPARATUS FOR CAPTURING RESULTS OF MEMORY TESTING

BUILT-IN-SELF-TEST (BIST) ORGANIZATIONAL FILE GENERATION

VALIDATING INTERCONNECTIONS BETWEEN LOGIC BLOCKS IN A CIRCUIT DESCR...

CLOCK EDGE GROUPING FOR AT-SPEED TEST