DOUGLAS R. REED

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Cat aware loads and software prefetches
- Patent number 12,099,444
- Issue date Sep 24, 2024
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetch state cache (PSC)
- Patent number 12,013,784
- Issue date Jun 18, 2024
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bounding box prefetcher
- Patent number 11,940,921
- Issue date Mar 26, 2024
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
L1D to L2 eviction
- Patent number 11,467,972
- Issue date Oct 11, 2022
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with memory controller including dynamically programmable...
- Patent number 11,061,853
- Issue date Jul 13, 2021
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network unit
- Patent number 11,029,949
- Issue date Jun 8, 2021
- SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with selective data storage (of accelerator) operable as...
- Patent number 10,725,934
- Issue date Jul 28, 2020
- SHANGHAI ZHAOXIN SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-mode set associative cache memory dynamically configurable to...
- Patent number 10,719,434
- Issue date Jul 21, 2020
- VIA ALLIANCE SEMICONDUCTORS CO., LTD.
- Douglas R. Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic cache replacement way selection based on address tag bits
- Patent number 10,698,827
- Issue date Jun 30, 2020
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Douglas R. Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with memory array operable as either cache memory or neur...
- Patent number 10,664,751
- Issue date May 26, 2020
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with an expandable instruction set architecture for dynam...
- Patent number 10,642,617
- Issue date May 5, 2020
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with memory array operable as either last level cache sli...
- Patent number 10,430,706
- Issue date Oct 1, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with memory array operable as either victim cache or neur...
- Patent number 10,423,876
- Issue date Sep 24, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetching with level of aggressiveness based on effectiveness by...
- Patent number 10,387,318
- Issue date Aug 20, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Distributed hang recovery logic
- Patent number 10,324,842
- Issue date Jun 18, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Douglas R. Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with programmable prefetcher operable to generate at leas...
- Patent number 10,268,586
- Issue date Apr 23, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor with programmable prefetcher operable to generate at leas...
- Patent number 10,268,587
- Issue date Apr 23, 2019
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Conversion system for a processor with an expandable instruction se...
- Patent number 10,146,543
- Issue date Dec 4, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compiler system for a processor with an expandable instruction set...
- Patent number 10,127,041
- Issue date Nov 13, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- G. Glenn Henry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic powering of cache memory by ways within multiple set groups...
- Patent number 10,073,787
- Issue date Sep 11, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Douglas R. Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic analyzer for detecting hangs
- Patent number 10,067,871
- Issue date Sep 4, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sanitize-aware DRAM controller
- Patent number 9,972,375
- Issue date May 15, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Terry Parks
- G11 - INFORMATION STORAGE
Information Patent Grant
Pattern detector for detecting hangs
- Patent number 9,946,651
- Issue date Apr 17, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory budgeted by ways based on memory access type
- Patent number 9,910,785
- Issue date Mar 6, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory diagnostic writeback
- Patent number 9,911,508
- Issue date Mar 6, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G11 - INFORMATION STORAGE
Information Patent Grant
Cache memory budgeted by chunks based on memory access type
- Patent number 9,898,411
- Issue date Feb 20, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache management request fusing
- Patent number 9,892,803
- Issue date Feb 13, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Douglas R. Reed
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiple data prefetchers that defer to one another based on prefet...
- Patent number 9,817,764
- Issue date Nov 14, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Set associative cache memory with heterogeneous replacement policy
- Patent number 9,811,468
- Issue date Nov 7, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-mode set associative cache memory dynamically configurable to...
- Patent number 9,798,668
- Issue date Oct 24, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Douglas R. Reed
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CAT AWARE LOADS AND SOFTWARE PREFETCHES
- Publication number 20230236973
- Publication date Jul 27, 2023
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCH STATE CACHE (PSC)
- Publication number 20230222065
- Publication date Jul 13, 2023
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOUNDING BOX PREFETCHER
- Publication number 20230222064
- Publication date Jul 13, 2023
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
L1D TO L2 EVICTION
- Publication number 20220171712
- Publication date Jun 2, 2022
- CENTAUR TECHNOLOGY, INC.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCH APPARATUS AND METHOD USING CONFIDENCE METRIC FOR PROCESSOR...
- Publication number 20200301840
- Publication date Sep 24, 2020
- Shanghai Zhaoxin Semiconductor Co., Ltd.
- Douglas Raye Reed
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH SELECTIVE DATA STORAGE OPERABLE AS EITHER VICTIM CAC...
- Publication number 20180267898
- Publication date Sep 20, 2018
- Shanghai Zhaoxin Semiconductor Co., Ltd.
- G. Glenn HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK UNIT
- Publication number 20180225116
- Publication date Aug 9, 2018
- Shanghai Zhaoxin Semiconductor Co., Ltd.
- G. Glenn HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH MEMORY ARRAY OPERABLE AS EITHER LAST LEVEL CACHE SLI...
- Publication number 20180157967
- Publication date Jun 7, 2018
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH MEMORY ARRAY OPERABLE AS EITHER VICTIM CACHE OR NEUR...
- Publication number 20180157968
- Publication date Jun 7, 2018
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH MEMORY ARRAY OPERABLE AS EITHER CACHE MEMORY OR NEUR...
- Publication number 20180157970
- Publication date Jun 7, 2018
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY BUDGETED BY WAYS BASED ON MEMORY ACCESS TYPE
- Publication number 20170315921
- Publication date Nov 2, 2017
- VIA ALLIANCE SEMICODUCTOR CO., LTD.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH MEMORY CONTROLLER INCLUDING DYNAMICALLY PROGRAMMABLE...
- Publication number 20170308314
- Publication date Oct 26, 2017
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SANITIZE-AWARE DRAM CONTROLLER
- Publication number 20170301386
- Publication date Oct 19, 2017
- VIA Alliance Semiconductor Co., Ltd.
- TERRY PARKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC POWERING OF CACHE MEMORY BY WAYS WITHIN MULTIPLE SET GROUPS...
- Publication number 20170300418
- Publication date Oct 19, 2017
- VIA Alliance Semiconductor Co., Ltd.
- Douglas R. REED
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH PROGRAMMABLE PREFETCHER
- Publication number 20170161195
- Publication date Jun 8, 2017
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPILER SYSTEM FOR A PROCESSOR WITH AN EXPANDABLE INSTRUCTION SET...
- Publication number 20170161036
- Publication date Jun 8, 2017
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH AN EXPANDABLE INSTRUCTION SET ARCHITECTURE FOR DYNAM...
- Publication number 20170161067
- Publication date Jun 8, 2017
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH PROGRAMMABLE PREFETCHER
- Publication number 20170161196
- Publication date Jun 8, 2017
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONVERSION SYSTEM FOR A PROCESSOR WITH AN EXPANDABLE INSTRUCTION SE...
- Publication number 20170161037
- Publication date Jun 8, 2017
- VIA Alliance Semiconductor Co., Ltd.
- G. GLENN HENRY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCHING WITH LEVEL OF AGGRESSIVENESS BASED ON EFFECTIVENESS BY...
- Publication number 20170123985
- Publication date May 4, 2017
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SET ASSOCIATIVE CACHE MEMORY WITH HETEROGENEOUS REPLACEMENT POLICY
- Publication number 20160357680
- Publication date Dec 8, 2016
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-MODE SET ASSOCIATIVE CACHE MEMORY DYNAMICALLY CONFIGURABLE TO...
- Publication number 20160357681
- Publication date Dec 8, 2016
- VIA Alliance Semicanductor Co., Ltd.
- Douglas R. REED
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-MODE SET ASSOCIATIVE CACHE MEMORY DYNAMICALLY CONFIGURABLE TO...
- Publication number 20160357664
- Publication date Dec 8, 2016
- Via Alliance Semiconductor co., Ltd.
- DOUGLAS R. REED
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE DATA PREFETCHERS THAT DEFER TO ONE ANOTHER BASED ON PREFET...
- Publication number 20160357677
- Publication date Dec 8, 2016
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC CACHE REPLACEMENT WAY SELECTION BASED ON ADDRESS TAG BITS
- Publication number 20160350229
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- DOUGLAS R. REED
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PATTERN DETECTOR FOR DETECTING HANGS
- Publication number 20160350224
- Publication date Dec 1, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE REPLACEMENT POLICY THAT CONSIDERS MEMORY ACCESS TYPE
- Publication number 20160350228
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONDITIONAL PATTERN DETECTOR FOR DETECTING HANGS
- Publication number 20160350167
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- Rodney E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTRIBUTED HANG RECOVERY LOGIC
- Publication number 20160350215
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- DOUGLAS R. REED
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGIC ANALYZER FOR DETECTING HANGS
- Publication number 20160350223
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- Rodney E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING

DOUGLAS R. REED

Person

Patents Grantslast 30 patents

Cat aware loads and software prefetches

Prefetch state cache (PSC)

Bounding box prefetcher

L1D to L2 eviction

Processor with memory controller including dynamically programmable...

Neural network unit

Processor with selective data storage (of accelerator) operable as...

Multi-mode set associative cache memory dynamically configurable to...

Dynamic cache replacement way selection based on address tag bits

Processor with memory array operable as either cache memory or neur...

Processor with an expandable instruction set architecture for dynam...

Processor with memory array operable as either last level cache sli...

Processor with memory array operable as either victim cache or neur...

Prefetching with level of aggressiveness based on effectiveness by...

Distributed hang recovery logic

Processor with programmable prefetcher operable to generate at leas...

Processor with programmable prefetcher operable to generate at leas...

Conversion system for a processor with an expandable instruction se...

Compiler system for a processor with an expandable instruction set...

Dynamic powering of cache memory by ways within multiple set groups...

Logic analyzer for detecting hangs

Sanitize-aware DRAM controller

Pattern detector for detecting hangs

Cache memory budgeted by ways based on memory access type

Cache memory diagnostic writeback

Cache memory budgeted by chunks based on memory access type

Cache management request fusing

Multiple data prefetchers that defer to one another based on prefet...

Set associative cache memory with heterogeneous replacement policy

Multi-mode set associative cache memory dynamically configurable to...

Patents Applicationslast 30 patents

CAT AWARE LOADS AND SOFTWARE PREFETCHES

PREFETCH STATE CACHE (PSC)

BOUNDING BOX PREFETCHER

L1D TO L2 EVICTION

PREFETCH APPARATUS AND METHOD USING CONFIDENCE METRIC FOR PROCESSOR...

PROCESSOR WITH SELECTIVE DATA STORAGE OPERABLE AS EITHER VICTIM CAC...

NEURAL NETWORK UNIT

PROCESSOR WITH MEMORY ARRAY OPERABLE AS EITHER LAST LEVEL CACHE SLI...

PROCESSOR WITH MEMORY ARRAY OPERABLE AS EITHER VICTIM CACHE OR NEUR...

PROCESSOR WITH MEMORY ARRAY OPERABLE AS EITHER CACHE MEMORY OR NEUR...

CACHE MEMORY BUDGETED BY WAYS BASED ON MEMORY ACCESS TYPE

PROCESSOR WITH MEMORY CONTROLLER INCLUDING DYNAMICALLY PROGRAMMABLE...

SANITIZE-AWARE DRAM CONTROLLER

DYNAMIC POWERING OF CACHE MEMORY BY WAYS WITHIN MULTIPLE SET GROUPS...

PROCESSOR WITH PROGRAMMABLE PREFETCHER

COMPILER SYSTEM FOR A PROCESSOR WITH AN EXPANDABLE INSTRUCTION SET...

PROCESSOR WITH AN EXPANDABLE INSTRUCTION SET ARCHITECTURE FOR DYNAM...

PROCESSOR WITH PROGRAMMABLE PREFETCHER

CONVERSION SYSTEM FOR A PROCESSOR WITH AN EXPANDABLE INSTRUCTION SE...

PREFETCHING WITH LEVEL OF AGGRESSIVENESS BASED ON EFFECTIVENESS BY...

SET ASSOCIATIVE CACHE MEMORY WITH HETEROGENEOUS REPLACEMENT POLICY

MULTI-MODE SET ASSOCIATIVE CACHE MEMORY DYNAMICALLY CONFIGURABLE TO...

MULTI-MODE SET ASSOCIATIVE CACHE MEMORY DYNAMICALLY CONFIGURABLE TO...

MULTIPLE DATA PREFETCHERS THAT DEFER TO ONE ANOTHER BASED ON PREFET...

DYNAMIC CACHE REPLACEMENT WAY SELECTION BASED ON ADDRESS TAG BITS

PATTERN DETECTOR FOR DETECTING HANGS

CACHE REPLACEMENT POLICY THAT CONSIDERS MEMORY ACCESS TYPE

CONDITIONAL PATTERN DETECTOR FOR DETECTING HANGS

DISTRIBUTED HANG RECOVERY LOGIC

LOGIC ANALYZER FOR DETECTING HANGS