Douglas T. Grider

Person

Pleasanton, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Split gate memory cell fabrication and system
- Patent number 11,239,346
- Issue date Feb 1, 2022
- Texas Instruments Incorporated
- John Howard MacPeak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for stripping one or more layers from a semiconductor wafer
- Patent number 11,205,575
- Issue date Dec 21, 2021
- Texas Instruments Incorporated
- Byron Joseph Palla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Partially disposed gate layer into the trenches
- Patent number 11,189,626
- Issue date Nov 30, 2021
- Texas Instruments Incorporated
- Xiang-Zheng Bo
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit including vertical capacitors
- Patent number 11,152,068
- Issue date Oct 19, 2021
- Texas Instruments Incorporated
- Xiang-Zheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistors with dual wells
- Patent number 10,811,534
- Issue date Oct 20, 2020
- Texas Instruments Incorporated
- Xiang-Zheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit including vertical capacitors
- Patent number 10,622,073
- Issue date Apr 14, 2020
- Texas Instruments Incorporated
- Xiang-Zheng Bo
- G11 - INFORMATION STORAGE
Information Patent Grant
Select gate self-aligned patterning in split-gate flash memory cell
- Patent number 10,553,596
- Issue date Feb 4, 2020
- Texas Instruments Incorporated
- Xiangzheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Partially disposed gate layer into the trenches
- Patent number 10,446,563
- Issue date Oct 15, 2019
- Texas Instruments Incorporated
- Xiang-Zheng Bo
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Single mask level including a resistor and a through-gate implant
- Patent number 10,026,730
- Issue date Jul 17, 2018
- Texas Instruments Incorporated
- Mahalingam Nandakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Select gate self-aligned patterning in split-gate flash memory cell
- Patent number 9,966,380
- Issue date May 8, 2018
- Texas Instruments Incorporated
- Xiangzheng Bo
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of fabricating semiconductors
- Patent number 9,881,795
- Issue date Jan 30, 2018
- Texas Instruments Incorporated
- David Gerald Farber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single mask level including a resistor and a through-gate implant
- Patent number 9,761,581
- Issue date Sep 12, 2017
- Texas Instruments Incorporated
- Mahalingam Nandakumar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductors
- Patent number 9,490,143
- Issue date Nov 8, 2016
- Texas Instruments Incorporated
- David Gerald Farber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Feed-forward bidirectional implanted split-gate flash memory cell
- Patent number 9,461,060
- Issue date Oct 4, 2016
- Texas Instruments Incorporated
- Xiangzheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High tilt angle plus twist drain extension implant for CHC lifetime...
- Patent number 9,431,248
- Issue date Aug 30, 2016
- Texas Instruments Incorporated
- Xiang-Zheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Feed-forward bidirectional implanted split-gate flash memory cell
- Patent number 9,343,468
- Issue date May 17, 2016
- Texas Instruments Incorporated
- Xiangzheng Bo
- G11 - INFORMATION STORAGE
Information Patent Grant
Three dimensional three semiconductor high-voltage capacitors
- Patent number 9,318,337
- Issue date Apr 19, 2016
- Texas Instruments Incorporated
- Xiangzheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High tilt angle plus twist drain extension implant for CHC lifetime...
- Patent number 9,177,802
- Issue date Nov 3, 2015
- Texas Instruments Incorporated
- Xiang-Zheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High performance CMOS transistors using PMD liner stress
- Patent number 8,809,141
- Issue date Aug 19, 2014
- Texas Instruments Incorporated
- Haowen Bu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
In-situ carbon doped e-SiGeCB stack for MOS transistor
- Patent number 8,471,307
- Issue date Jun 25, 2013
- Texas Instruments Incorporated
- Rajesh B. Khamankar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nitrogen based implants for defect reduction in strained silicon
- Patent number 8,084,312
- Issue date Dec 27, 2011
- Texas Instruments Incorporated
- Srinivasan Chakravarthi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PMD liner nitride films and fabrication methods for improved NMOS p...
- Patent number 8,084,787
- Issue date Dec 27, 2011
- Texas Instruments Incorporated
- Haowen Bu
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Methods, systems and structures for forming semiconductor structure...
- Patent number 7,847,401
- Issue date Dec 7, 2010
- Texas Instruments Incorporated
- P R Chidambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Nitrogen based implants for defect reduction in strained silicon
- Patent number 7,670,892
- Issue date Mar 2, 2010
- Texas Instruments Incorporated
- Srinivasan Chakravarthi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable high voltage gate dielectric layers using a dual nitridati...
- Patent number 7,560,792
- Issue date Jul 14, 2009
- Texas Instruments Incorporated
- Rajesh Khamankar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods, systems and structures for forming semiconductor structure...
- Patent number 7,553,718
- Issue date Jun 30, 2009
- Texas Instruments Incorporated
- Periannan Chidambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Drive current improvement from recessed SiGe incorporation close to...
- Patent number 7,244,654
- Issue date Jul 17, 2007
- Texas Instruments Incorporated
- Pr Chidambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PMD liner nitride films and fabrication methods for improved NMOS p...
- Patent number 7,226,834
- Issue date Jun 5, 2007
- Texas Instruments Incorporated
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High performance CMOS transistors using PMD liner stress
- Patent number 7,192,894
- Issue date Mar 20, 2007
- Texas Instruments Incorporated
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reliable high voltage gate dielectric layers using a dual nitridati...
- Patent number 7,183,165
- Issue date Feb 27, 2007
- Texas Instruments Incorporated
- Rajesh Khamankar
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TRANSISTORS WITH DUAL WELLS
- Publication number 20230178652
- Publication date Jun 8, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Xiang-Zheng BO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH DUAL WELLS
- Publication number 20210050445
- Publication date Feb 18, 2021
- TEXAS INSTRUMENTS INCORPORATED
- Xiang-Zheng BO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SPLIT GATE MEMORY CELL FABRICATION AND SYSTEM
- Publication number 20200381541
- Publication date Dec 3, 2020
- TEXAS INSTRUMENTS INCORPORATED
- John Howard MacPeak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR STRIPPING ONE OR MORE LAYERS FROM A SEMICONDUCTOR WAFER
- Publication number 20200343099
- Publication date Oct 29, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Byron Joseph Palla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT INCLUDING VERTICAL CAPACITORS
- Publication number 20200219566
- Publication date Jul 9, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Xiang-Zheng BO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECT GATE SELF-ALIGNED PATTERNING IN SPLIT-GATE FLASH MEMORY CELL
- Publication number 20200161318
- Publication date May 21, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Xiangzheng BO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PARTIALLY DISPOSED GATE LAYER INTO THE TRENCHES
- Publication number 20200006362
- Publication date Jan 2, 2020
- TEXAS INSTRUMENTS INCORPORATED
- Xiang-Zheng BO
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT INCLUDING VERTICAL CAPACITORS
- Publication number 20190348119
- Publication date Nov 14, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Xiang-Zheng BO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PARTIALLY DISPOSED GATE LAYER INTO THE TRENCHES
- Publication number 20190312045
- Publication date Oct 10, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Xiang-Zheng BO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH DUAL WELLS
- Publication number 20190207025
- Publication date Jul 4, 2019
- TEXAS INSTRUMENTS INCORPORATED
- Xiang-Zheng BO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELECT GATE SELF-ALIGNED PATTERNING IN SPLIT-GATE FLASH MEMORY CELL
- Publication number 20180254281
- Publication date Sep 6, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Xiangzheng BO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE MASK LEVEL INCLUDING A RESISTOR AND A THROUGH-GATE IMPLANT
- Publication number 20170338223
- Publication date Nov 23, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Mahalingam NANDAKUMAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SINGLE MASK LEVEL INCLUDING A RESISTOR AND A THROUGH-GATE IMPLANT
- Publication number 20170256535
- Publication date Sep 7, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Mahalingam NANDAKUMAR
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING SEMICONDUCTORS
- Publication number 20170148634
- Publication date May 25, 2017
- TEXAS INSTRUMENTS INCORPORATED
- David Gerald Farber
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FEED-FORWARD BIDIRECTIONAL IMPLANTED SPLIT-GATE FLASH MEMORY CELL
- Publication number 20160284716
- Publication date Sep 29, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Xiangzheng BO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH TILT ANGLE PLUS TWIST DRAIN EXTENSION IMPLANT FOR CHC LIFETIME...
- Publication number 20160027647
- Publication date Jan 28, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Xiang-Zheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Three Dimensional Three Semiconductor High-Voltage Capacitors
- Publication number 20150076577
- Publication date Mar 19, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Xiangzheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH TILT ANGLE PLUS TWIST DRAIN EXTENSION IMPLANT FOR CHC LIFETIME...
- Publication number 20140187008
- Publication date Jul 3, 2014
- Xiang-Zheng Bo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POLYCRYSTALLINE SILICON EFUSE AND RESISTOR FABRICATION IN A METAL R...
- Publication number 20140011333
- Publication date Jan 9, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Benjamin P. McKee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nitrogen Based Implants for Defect Reduction in Strained Silicon
- Publication number 20100120215
- Publication date May 13, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Srinivasan CHAKRAVARTHI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
IN-SITU CARBON DOPED e-SiGeCB STACK FOR MOS TRANSISTOR
- Publication number 20090309140
- Publication date Dec 17, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Rajesh B. Khamankar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods, Systems and Structures for Forming Semiconductor Structure...
- Publication number 20090224296
- Publication date Sep 10, 2009
- TEXAS INSTRUMENTS INCORPORATED
- PR Chidambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PMD Liner Nitride Films and Fabrication Methods for Improved NMOS P...
- Publication number 20080251850
- Publication date Oct 16, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High performance CMOS transistors using PMD liner stress
- Publication number 20070128806
- Publication date Jun 7, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reliable high voltage gate dielectric layers using a dual nitridati...
- Publication number 20070117331
- Publication date May 24, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Rajesh Khamankar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Nitrogen based implants for defect reduction in strained silicon
- Publication number 20070105294
- Publication date May 10, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Srinivasan Chakravarthi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods, systems and structures for forming semiconductor structure...
- Publication number 20060172502
- Publication date Aug 3, 2006
- TEXAS INSTRUMENTS INCORPORATED
- PR Chidambaram
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High performance CMOS transistors using PMD linear stress
- Publication number 20050245012
- Publication date Nov 3, 2005
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PMD liner nitride films and fabrication methods for improved NMOS p...
- Publication number 20050233514
- Publication date Oct 20, 2005
- Haowen Bu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for transistor gate dielectric layer with uniform nitrogen c...
- Publication number 20050181625
- Publication date Aug 18, 2005
- Douglas T. Grider
- H01 - BASIC ELECTRIC ELEMENTS

Douglas T. Grider

Person

Patents Grantslast 30 patents

Split gate memory cell fabrication and system

Method for stripping one or more layers from a semiconductor wafer

Partially disposed gate layer into the trenches

Integrated circuit including vertical capacitors

Transistors with dual wells

Integrated circuit including vertical capacitors

Select gate self-aligned patterning in split-gate flash memory cell

Partially disposed gate layer into the trenches

Single mask level including a resistor and a through-gate implant

Select gate self-aligned patterning in split-gate flash memory cell

Method of fabricating semiconductors

Single mask level including a resistor and a through-gate implant

Method of fabricating semiconductors

Feed-forward bidirectional implanted split-gate flash memory cell

High tilt angle plus twist drain extension implant for CHC lifetime...

Feed-forward bidirectional implanted split-gate flash memory cell

Three dimensional three semiconductor high-voltage capacitors

High tilt angle plus twist drain extension implant for CHC lifetime...

High performance CMOS transistors using PMD liner stress

In-situ carbon doped e-SiGeCB stack for MOS transistor

Nitrogen based implants for defect reduction in strained silicon

PMD liner nitride films and fabrication methods for improved NMOS p...

Methods, systems and structures for forming semiconductor structure...

Nitrogen based implants for defect reduction in strained silicon

Reliable high voltage gate dielectric layers using a dual nitridati...

Methods, systems and structures for forming semiconductor structure...

Drive current improvement from recessed SiGe incorporation close to...

PMD liner nitride films and fabrication methods for improved NMOS p...

High performance CMOS transistors using PMD liner stress

Reliable high voltage gate dielectric layers using a dual nitridati...

Patents Applicationslast 30 patents

TRANSISTORS WITH DUAL WELLS

TRANSISTORS WITH DUAL WELLS

SPLIT GATE MEMORY CELL FABRICATION AND SYSTEM

METHOD FOR STRIPPING ONE OR MORE LAYERS FROM A SEMICONDUCTOR WAFER

INTEGRATED CIRCUIT INCLUDING VERTICAL CAPACITORS

SELECT GATE SELF-ALIGNED PATTERNING IN SPLIT-GATE FLASH MEMORY CELL

PARTIALLY DISPOSED GATE LAYER INTO THE TRENCHES

INTEGRATED CIRCUIT INCLUDING VERTICAL CAPACITORS

PARTIALLY DISPOSED GATE LAYER INTO THE TRENCHES

TRANSISTORS WITH DUAL WELLS

SELECT GATE SELF-ALIGNED PATTERNING IN SPLIT-GATE FLASH MEMORY CELL

SINGLE MASK LEVEL INCLUDING A RESISTOR AND A THROUGH-GATE IMPLANT

SINGLE MASK LEVEL INCLUDING A RESISTOR AND A THROUGH-GATE IMPLANT

METHOD OF FABRICATING SEMICONDUCTORS

FEED-FORWARD BIDIRECTIONAL IMPLANTED SPLIT-GATE FLASH MEMORY CELL

HIGH TILT ANGLE PLUS TWIST DRAIN EXTENSION IMPLANT FOR CHC LIFETIME...

Three Dimensional Three Semiconductor High-Voltage Capacitors

HIGH TILT ANGLE PLUS TWIST DRAIN EXTENSION IMPLANT FOR CHC LIFETIME...

POLYCRYSTALLINE SILICON EFUSE AND RESISTOR FABRICATION IN A METAL R...

Nitrogen Based Implants for Defect Reduction in Strained Silicon

IN-SITU CARBON DOPED e-SiGeCB STACK FOR MOS TRANSISTOR

Methods, Systems and Structures for Forming Semiconductor Structure...

PMD Liner Nitride Films and Fabrication Methods for Improved NMOS P...

High performance CMOS transistors using PMD liner stress

Reliable high voltage gate dielectric layers using a dual nitridati...

Nitrogen based implants for defect reduction in strained silicon

Methods, systems and structures for forming semiconductor structure...

High performance CMOS transistors using PMD linear stress

PMD liner nitride films and fabrication methods for improved NMOS p...

Method for transistor gate dielectric layer with uniform nitrogen c...