Douglas Vanesko

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Efficient processing of nested loops for computing device with mult...
- Patent number 12,293,187
- Issue date May 6, 2025
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loop execution in a reconfigurable compute fabric
- Patent number 12,242,884
- Issue date Mar 4, 2025
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interpolation acceleration in a processor memory interface
- Patent number 12,174,759
- Issue date Dec 24, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context load mechanism in a coarse-grained reconfigurable array pro...
- Patent number 12,038,868
- Issue date Jul 16, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loop execution in a reconfigurable compute fabric using flow contro...
- Patent number 11,907,718
- Issue date Feb 20, 2024
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient processing of nested loops for computing device with mult...
- Patent number 11,861,366
- Issue date Jan 2, 2024
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programming a coarse grained reconfigurable array through descripti...
- Patent number 11,815,935
- Issue date Nov 14, 2023
- Micron Technology, Inc.
- Skyler Arron Windh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Increasing cache hits for synthetic aperture radar
- Patent number 11,802,957
- Issue date Oct 31, 2023
- Micron Technology, Inc.
- Patrick Estep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Loading data from memory during dispatch
- Patent number 11,789,642
- Issue date Oct 17, 2023
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data input/output operations during loop execution in a reconfigura...
- Patent number 11,709,796
- Issue date Jul 25, 2023
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tile-based result buffering in memory-compute systems
- Patent number 11,675,588
- Issue date Jun 13, 2023
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE
- Publication number 20250068572
- Publication date Feb 27, 2025
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT LOAD MECHANISM IN A COARSE-GRAINED RECONFIGURABLE ARRAY PRO...
- Publication number 20240330237
- Publication date Oct 3, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOP EXECUTION IN A RECONFIGURABLE COMPUTE FABRIC USING FLOW CONTRO...
- Publication number 20240192955
- Publication date Jun 13, 2024
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT PROCESSING OF NESTED LOOPS FOR COMPUTING DEVICE WITH MULT...
- Publication number 20240111538
- Publication date Apr 4, 2024
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT LOAD MECHANISM IN A COARSE-GRAINED RECONFIGURABLE ARRAY PRO...
- Publication number 20240070112
- Publication date Feb 29, 2024
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programming a Coarse Grained Reconfigurable Array through Descripti...
- Publication number 20230315415
- Publication date Oct 5, 2023
- Micron Technology, Inc.
- Skyler Arron Windh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configure a Coarse Grained Reconfigurable Array to Execute Instruct...
- Publication number 20230305842
- Publication date Sep 28, 2023
- Micron Technology, Inc.
- Skyler Arron Windh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TILE-BASED RESULT BUFFERING IN MEMORY-COMPUTE SYSTEMS
- Publication number 20230067771
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOP EXECUTION IN A RECONFIGURABLE COMPUTE FABRIC.
- Publication number 20230055320
- Publication date Feb 23, 2023
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL MATRIX OPERATIONS IN A RECONFIGURABLE COMPUTE FABRIC
- Publication number 20230056246
- Publication date Feb 23, 2023
- Micron Technology, Inc.
- Skyler Arron Windh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA INPUT/OUTPUT OPERATIONS DURING LOOP EXECUTION IN A RECONFIGURA...
- Publication number 20230050687
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT PROCESSING OF NESTED LOOPS FOR COMPUTING DEVICE WITH MULT...
- Publication number 20230051544
- Publication date Feb 16, 2023
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOADING DATA FROM MEMORY DURING DISPATCH
- Publication number 20220413742
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT COMPLEX MULTIPLY AND ACCUMULATE
- Publication number 20220413804
- Publication date Dec 29, 2022
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREASING CACHE HITS FOR SYNTHETIC APERTURE RADAR
- Publication number 20220317283
- Publication date Oct 6, 2022
- Micron Technology, Inc.
- Patrick Estep
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE
- Publication number 20220318162
- Publication date Oct 6, 2022
- Micron Technology, Inc.
- Bryan Hornung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE FOR CONCURRENT SINE AND COSINE DETERMINATION
- Publication number 20220317972
- Publication date Oct 6, 2022
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOOP EXECUTION IN A RECONFIGURABLE COMPUTE FABRIC
- Publication number 20220206804
- Publication date Jun 30, 2022
- Micron Technology, Inc.
- Douglas Vanesko
- G06 - COMPUTING CALCULATING COUNTING

Douglas Vanesko

Person

Patents Grantslast 30 patents

Efficient processing of nested loops for computing device with mult...

Loop execution in a reconfigurable compute fabric

Interpolation acceleration in a processor memory interface

Context load mechanism in a coarse-grained reconfigurable array pro...

Loop execution in a reconfigurable compute fabric using flow contro...

Efficient processing of nested loops for computing device with mult...

Programming a coarse grained reconfigurable array through descripti...

Increasing cache hits for synthetic aperture radar

Loading data from memory during dispatch

Data input/output operations during loop execution in a reconfigura...

Tile-based result buffering in memory-compute systems

Patents Applicationslast 30 patents

INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE

CONTEXT LOAD MECHANISM IN A COARSE-GRAINED RECONFIGURABLE ARRAY PRO...

LOOP EXECUTION IN A RECONFIGURABLE COMPUTE FABRIC USING FLOW CONTRO...

EFFICIENT PROCESSING OF NESTED LOOPS FOR COMPUTING DEVICE WITH MULT...

CONTEXT LOAD MECHANISM IN A COARSE-GRAINED RECONFIGURABLE ARRAY PRO...

Programming a Coarse Grained Reconfigurable Array through Descripti...

Configure a Coarse Grained Reconfigurable Array to Execute Instruct...

TILE-BASED RESULT BUFFERING IN MEMORY-COMPUTE SYSTEMS

LOOP EXECUTION IN A RECONFIGURABLE COMPUTE FABRIC.

PARALLEL MATRIX OPERATIONS IN A RECONFIGURABLE COMPUTE FABRIC

DATA INPUT/OUTPUT OPERATIONS DURING LOOP EXECUTION IN A RECONFIGURA...

EFFICIENT PROCESSING OF NESTED LOOPS FOR COMPUTING DEVICE WITH MULT...

LOADING DATA FROM MEMORY DURING DISPATCH

EFFICIENT COMPLEX MULTIPLY AND ACCUMULATE

INCREASING CACHE HITS FOR SYNTHETIC APERTURE RADAR

INTERPOLATION ACCELERATION IN A PROCESSOR MEMORY INTERFACE

HARDWARE FOR CONCURRENT SINE AND COSINE DETERMINATION

LOOP EXECUTION IN A RECONFIGURABLE COMPUTE FABRIC