Duane F. Mills

Person

Sacramento, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Efficient power scheme for redundancy
- Patent number 11,868,220
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory device having 2-transistor vertical memory cell and separate...
- Patent number 11,778,806
- Issue date Oct 3, 2023
- Micron Technology, Inc.
- Eric S. Carman
- G11 - INFORMATION STORAGE
Information Patent Grant
On-demand memory page size
- Patent number 11,747,982
- Issue date Sep 5, 2023
- Micron Technology, Inc.
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wear leveling for random access and ferroelectric memory
- Patent number 11,605,412
- Issue date Mar 14, 2023
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative section selection within a memory device
- Patent number 11,562,805
- Issue date Jan 24, 2023
- Micron Technology, Inc.
- Richard E. Fackenthal
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cell sensing stress mitigation
- Patent number 11,222,668
- Issue date Jan 11, 2022
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Grant
On demand memory page size
- Patent number 11,157,176
- Issue date Oct 26, 2021
- Micron Technology, Inc.
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wear leveling
- Patent number 11,003,361
- Issue date May 11, 2021
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wear leveling for random access and ferroelectric memory
- Patent number 10,971,203
- Issue date Apr 6, 2021
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Speculative section selection within a memory device
- Patent number 10,872,678
- Issue date Dec 22, 2020
- Micron Technology, Inc.
- Richard E. Fackenthal
- G11 - INFORMATION STORAGE
Information Patent Grant
Wear leveling
- Patent number 10,585,597
- Issue date Mar 10, 2020
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wear leveling
- Patent number 10,416,903
- Issue date Sep 17, 2019
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for sensing logic values stored in memory cells using se...
- Patent number 10,410,709
- Issue date Sep 10, 2019
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Grant
On demand memory page size
- Patent number 10,394,456
- Issue date Aug 27, 2019
- Micron Technology, Inc.
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wear leveling for random access and ferroelectric memory
- Patent number 10,388,351
- Issue date Aug 20, 2019
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wear leveling
- Patent number 10,198,195
- Issue date Feb 5, 2019
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for sensing logic values stored in memory cells using se...
- Patent number 9,886,991
- Issue date Feb 6, 2018
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Grant
Wireless interface to program phase-change memories
- Patent number 8,331,857
- Issue date Dec 11, 2012
- Micron Technology, Inc.
- Mostafa Naguib Abdulla
- G11 - INFORMATION STORAGE
Information Patent Grant
Protection register for a non-volatile memory
- Patent number 8,064,278
- Issue date Nov 22, 2011
- STMicroelectronics S.r.l.
- Chin-Tin Tina Yu
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for using an in package power supply to supply power to an i...
- Patent number 7,823,279
- Issue date Nov 2, 2010
- Intel Corporation
- Steven R. Eskildsen
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous interface for a nonvolatile memory
- Patent number 6,564,285
- Issue date May 13, 2003
- Intel Corporation
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous interface for a nonvolatile memory
- Patent number 6,385,688
- Issue date May 7, 2002
- Intel Corporation
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic single bit per cell to multiple bit per cell memory
- Patent number 6,097,637
- Issue date Aug 1, 2000
- Intel Corporation
- Mark E. Bauer
- G11 - INFORMATION STORAGE
Information Patent Grant
Flash memory including a mode register for indicating synchronous o...
- Patent number 6,026,465
- Issue date Feb 15, 2000
- Intel Corporation
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Override signal for forcing a powerdown of a flash memory
- Patent number 5,812,861
- Issue date Sep 22, 1998
- Intel Corporation
- Michel I. Ishac
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing burst read operations in an asy...
- Patent number 5,696,917
- Issue date Dec 9, 1997
- Intel Corporation
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined read architecture for memory
- Patent number 5,684,752
- Issue date Nov 4, 1997
- Intel Corporation
- Duane R. Mills
- G11 - INFORMATION STORAGE
Information Patent Grant
Pipelined read architecture for memory
- Patent number 5,592,435
- Issue date Jan 7, 1997
- Intel Corporation
- Duane R. Mills
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous address latching for memory arrays
- Patent number 5,586,081
- Issue date Dec 17, 1996
- Intel Corporation
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuitry for preventing propagation of undesired ATD pu...
- Patent number 5,563,843
- Issue date Oct 8, 1996
- Intel Corporation
- Richard E. Fackenthal
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SEPARATE...
- Publication number 20230422471
- Publication date Dec 28, 2023
- Micron Technology, Inc.
- Eric S. Carman
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SEPARATE...
- Publication number 20230031904
- Publication date Feb 2, 2023
- Micron Technology, Inc.
- Eric S. Carman
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SHIELD S...
- Publication number 20220278112
- Publication date Sep 1, 2022
- Micron Technology, Inc.
- Kamal M. Karda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEMAND MEMORY PAGE SIZE
- Publication number 20220019349
- Publication date Jan 20, 2022
- Micron Technology, Inc.
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEAR LEVELING FOR RANDOM ACCESS AND FERROELECTRIC MEMORY
- Publication number 20210264960
- Publication date Aug 26, 2021
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECULATIVE SECTION SELECTION WITHIN A MEMORY DEVICE
- Publication number 20210134386
- Publication date May 6, 2021
- Micron Technology, Inc.
- Richard E. Fackenthal
- G11 - INFORMATION STORAGE
Information Patent Application
SPECULATIVE SECTION SELECTION WITHIN A MEMORY DEVICE
- Publication number 20200402606
- Publication date Dec 24, 2020
- Micron Technology, Inc.
- Richard E. Fackenthal
- G11 - INFORMATION STORAGE
Information Patent Application
EFFICIENT POWER SCHEME FOR REDUNDANCY
- Publication number 20200401490
- Publication date Dec 24, 2020
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEAR LEVELING
- Publication number 20200159420
- Publication date May 21, 2020
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEAR LEVELING FOR RANDOM ACCESS AND FERROELECTRIC MEMORY
- Publication number 20190392882
- Publication date Dec 26, 2019
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON DEMAND MEMORY PAGE SIZE
- Publication number 20190339866
- Publication date Nov 7, 2019
- Micron Technology, Inc.
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEAR LEVELING
- Publication number 20190332281
- Publication date Oct 31, 2019
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEAR LEVELING FOR RANDOM ACCESS AND FERROELECTRIC MEMORY
- Publication number 20190066752
- Publication date Feb 28, 2019
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON DEMAND MEMORY PAGE SIZE
- Publication number 20190065051
- Publication date Feb 28, 2019
- Micron Technology, Inc.
- Duane R. Mills
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEAR LEVELING
- Publication number 20190042109
- Publication date Feb 7, 2019
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WEAR LEVELING
- Publication number 20190042107
- Publication date Feb 7, 2019
- Micron Technology, Inc.
- Richard E. Fackenthal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR SENSING LOGIC VALUES STORED IN MEMORY CELLS USING SE...
- Publication number 20180137906
- Publication date May 17, 2018
- Micron Technology, Inc.
- Daniele Vimercati
- G11 - INFORMATION STORAGE
Information Patent Application
Providing in package power supplies for integrated circuits
- Publication number 20110012670
- Publication date Jan 20, 2011
- Steven R. Eskildsen
- G11 - INFORMATION STORAGE
Information Patent Application
WIRELESS INTERFACE TO PROGRAM PHASE-CHANGE MEMORIES
- Publication number 20100291867
- Publication date Nov 18, 2010
- Mostafa Naguib Abdulla
- G11 - INFORMATION STORAGE
Information Patent Application
PROTECTION REGISTER FOR A NON-VOLATILE MEMORY
- Publication number 20100165765
- Publication date Jul 1, 2010
- STMicroelectronics S.r. I.
- Chin-Tin Tina Yu
- G11 - INFORMATION STORAGE
Information Patent Application
Providing in package power supplies for integrated circuits
- Publication number 20030184963
- Publication date Oct 2, 2003
- Steven R. Eskildsen
- G11 - INFORMATION STORAGE

Duane F. Mills

Person

Patents Grantslast 30 patents

Efficient power scheme for redundancy

Memory device having 2-transistor vertical memory cell and separate...

On-demand memory page size

Wear leveling for random access and ferroelectric memory

Speculative section selection within a memory device

Memory cell sensing stress mitigation

On demand memory page size

Wear leveling

Wear leveling for random access and ferroelectric memory

Speculative section selection within a memory device

Wear leveling

Wear leveling

Techniques for sensing logic values stored in memory cells using se...

On demand memory page size

Wear leveling for random access and ferroelectric memory

Wear leveling

Techniques for sensing logic values stored in memory cells using se...

Wireless interface to program phase-change memories

Protection register for a non-volatile memory

Method for using an in package power supply to supply power to an i...

Synchronous interface for a nonvolatile memory

Asynchronous interface for a nonvolatile memory

Dynamic single bit per cell to multiple bit per cell memory

Flash memory including a mode register for indicating synchronous o...

Override signal for forcing a powerdown of a flash memory

Method and apparatus for performing burst read operations in an asy...

Pipelined read architecture for memory

Pipelined read architecture for memory

Synchronous address latching for memory arrays

Method and circuitry for preventing propagation of undesired ATD pu...

Patents Applicationslast 30 patents

MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SEPARATE...

MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SEPARATE...

MEMORY DEVICE HAVING 2-TRANSISTOR VERTICAL MEMORY CELL AND SHIELD S...

DEMAND MEMORY PAGE SIZE

WEAR LEVELING FOR RANDOM ACCESS AND FERROELECTRIC MEMORY

SPECULATIVE SECTION SELECTION WITHIN A MEMORY DEVICE

SPECULATIVE SECTION SELECTION WITHIN A MEMORY DEVICE

EFFICIENT POWER SCHEME FOR REDUNDANCY

WEAR LEVELING

WEAR LEVELING FOR RANDOM ACCESS AND FERROELECTRIC MEMORY

ON DEMAND MEMORY PAGE SIZE

WEAR LEVELING

WEAR LEVELING FOR RANDOM ACCESS AND FERROELECTRIC MEMORY

ON DEMAND MEMORY PAGE SIZE

WEAR LEVELING

WEAR LEVELING

TECHNIQUES FOR SENSING LOGIC VALUES STORED IN MEMORY CELLS USING SE...

Providing in package power supplies for integrated circuits

WIRELESS INTERFACE TO PROGRAM PHASE-CHANGE MEMORIES

PROTECTION REGISTER FOR A NON-VOLATILE MEMORY

Providing in package power supplies for integrated circuits