Durgesh Srivastava

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Network interface controller with eviction cache
- Patent number 12,132,581
- Issue date Oct 29, 2024
- Intel Corporation
- Sujoy Sen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ballooning for multi-tiered pooled memory
- Patent number 11,983,408
- Issue date May 14, 2024
- Intel Corporation
- Rasika Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context aware selective backlighting techniques
- Patent number 11,726,565
- Issue date Aug 15, 2023
- Intel Corporation
- Dhaval V. Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ballooning for multi-tiered pooled memory
- Patent number 11,681,439
- Issue date Jun 20, 2023
- Intel Corporation
- Rasika Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tenant based allocation for pooled memory
- Patent number 11,573,722
- Issue date Feb 7, 2023
- Intel Corporation
- Rasika Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context aware selective backlighting techniques
- Patent number 11,397,464
- Issue date Jul 26, 2022
- Intel Corporation
- Dhaval V. Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context aware selective backlighting techniques
- Patent number 10,976,815
- Issue date Apr 13, 2021
- Intel Corporation
- Dhaval V. Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Context aware selective backlighting techniques
- Patent number 10,324,525
- Issue date Jun 18, 2019
- Intel Corporation
- Dhaval V. Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core integrated circuit configurable to provide multiple logi...
- Patent number 9,229,895
- Issue date Jan 5, 2016
- Intel Corporation
- James A. Coleman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Disabling portions of memory with defects
- Patent number 8,091,000
- Issue date Jan 3, 2012
- Intel Corporation
- Tsung-Yung (Jonathan) Chang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for reducing power consumption in multi-channe...
- Patent number 8,024,594
- Issue date Sep 20, 2011
- Intel Corporation
- Yean Kee Yong
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Supporting un-buffered memory modules on a platform configured for...
- Patent number 7,861,053
- Issue date Dec 28, 2010
- Intel Corporation
- Kok Lye Wah
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for fast frequency switch for a power throttle in...
- Patent number 7,725,757
- Issue date May 25, 2010
- Intel Corporation
- Kiran Padweka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for fast frequency switch for a power throttle in...
- Patent number 7,571,341
- Issue date Aug 4, 2009
- Intel Corporation
- Kiran Padwekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct cache access in multiple core processors
- Patent number 7,555,597
- Issue date Jun 30, 2009
- Intel Corporation
- Durgesh Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for fast frequency switch for a power throttle in...
- Patent number 7,475,269
- Issue date Jan 6, 2009
- Intel Corporation
- Kiran Padwekar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for fast frequency switch for a power throttle in...
- Patent number 7,272,736
- Issue date Sep 18, 2007
- Intel Corporation
- Kiran Padwekar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
BALLOONING FOR MULTI-TIERED POOLED MEMORY
- Publication number 20230333738
- Publication date Oct 19, 2023
- Intel Corporation
- Rasika Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD TO MINIMIZE HOT/COLD PAGE DETECTION OVERHEAD ON RUNNING WORK...
- Publication number 20230092541
- Publication date Mar 23, 2023
- Intel Corporation
- Francois DUGAST
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT AWARE SELECTIVE BACKLIGHTING TECHNIQUES
- Publication number 20220357795
- Publication date Nov 10, 2022
- Intel Corporation
- Dhaval V. Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR INTELLIGENT MEMORY PAGE MANAGEMENT
- Publication number 20220283951
- Publication date Sep 8, 2022
- Intel Corporation
- Neha PATHAPATI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY POOL MANAGEMENT
- Publication number 20220050722
- Publication date Feb 17, 2022
- Intel Corporation
- Francois DUGAST
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS, SYSTEM AND METHOD TO SAMPLE PAGE TABLE ENTRY METADATA BE...
- Publication number 20220012209
- Publication date Jan 13, 2022
- Intel Corporation
- Francois Dugast
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS, SYSTEM AND METHOD TO SAMPLE PAGE TABLE ENTRY METADATA BE...
- Publication number 20220004500
- Publication date Jan 6, 2022
- Intel Corporation
- Francois Dugast
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY POOLED TIME SENSITIVE NETWORKING BASED ARCHITECTURES
- Publication number 20210377150
- Publication date Dec 2, 2021
- Intel Corporation
- Francois Dugast
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CONTEXT AWARE SELECTIVE BACKLIGHTING TECHNIQUES
- Publication number 20210200309
- Publication date Jul 1, 2021
- Intel Corporation
- Dhaval V. Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY THIN PROVISIONING USING MEMORY POOLS
- Publication number 20210200667
- Publication date Jul 1, 2021
- Intel Corporation
- Debra BERNSTEIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK INTERFACE CONTROLLER WITH EVICTION CACHE
- Publication number 20210149812
- Publication date May 20, 2021
- Intel Corporation
- Sujoy SEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT MEMORY ACCESS (DMA) ENGINE WITH NETWORK INTERFACE CAPABILITIES
- Publication number 20210105207
- Publication date Apr 8, 2021
- Intel Corporation
- Sujoy SEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED MEMORY
- Publication number 20210081312
- Publication date Mar 18, 2021
- Intel Corporation
- Bassam N. COURY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKET MULTI-CAST FOR MEMORY POOL REPLICATION
- Publication number 20210075633
- Publication date Mar 11, 2021
- Intel Corporation
- Sujoy SEN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PAGE-BASED REMOTE MEMORY ACCESS USING SYSTEM MEMORY INTERFACE NETWO...
- Publication number 20210073151
- Publication date Mar 11, 2021
- Intel Corporation
- Sujoy SEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY AND STORAGE POOL INTERFACES
- Publication number 20210019069
- Publication date Jan 21, 2021
- Intel Corporation
- Sujoy SEN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TENANT BASED ALLOCATION FOR POOLED MEMORY
- Publication number 20200363975
- Publication date Nov 19, 2020
- Intel Corporation
- Rasika Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BALLOONING FOR MULTI-TIERED POOLED MEMORY
- Publication number 20200326861
- Publication date Oct 15, 2020
- Intel Corporation
- Rasika Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE FUNCTION EXECUTION IN A FUNCTION AS A SERVICE (FAAS) ARCHI...
- Publication number 20200195520
- Publication date Jun 18, 2020
- Intel Corporation
- Francesc GUIM BERNAT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT AWARE SELECTIVE BACKLIGHTING TECHNIQUES
- Publication number 20190302885
- Publication date Oct 3, 2019
- Intel Corporation
- Dhaval V. Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTEXT AWARE SELECTIVE BACKLIGHTING TECHNIQUES
- Publication number 20180188803
- Publication date Jul 5, 2018
- Intel Corporation
- Dhaval V. Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE INTEGRATED CIRCUIT CONFIGURABLE TO PROVIDE MULTIPLE LOGI...
- Publication number 20140075082
- Publication date Mar 13, 2014
- James A. Coleman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING A PROCESSOR CACHE USING A REAL-TIME ATTRIBUTE
- Publication number 20130254491
- Publication date Sep 26, 2013
- James A. Coleman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISABLING PORTIONS OF MEMORY WITH DEFECTS
- Publication number 20100058109
- Publication date Mar 4, 2010
- Tsung-Yung (Jonathan) Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISABLING PORTIONS OF MEMORY WITH DEFECTS
- Publication number 20090300413
- Publication date Dec 3, 2009
- Tsung-Yung (Jonathan) Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN MULTI-CHANNE...
- Publication number 20090249102
- Publication date Oct 1, 2009
- Intel Corporation
- Yean Kee Yong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORTING UN-BUFFERED MEMORY MODULES ON A PLATFORM CONFIGURED FOR...
- Publication number 20090089480
- Publication date Apr 2, 2009
- Kok Lye Wah
- G11 - INFORMATION STORAGE
Information Patent Application
Implementing Asynchronous Request for Forcing Dynamic Memory into S...
- Publication number 20090089514
- Publication date Apr 2, 2009
- Durgesh Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Direct cache access in multiple core processors
- Publication number 20080065832
- Publication date Mar 13, 2008
- Durgesh Srivastava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for fast frequency switch for a power throttle in...
- Publication number 20080034237
- Publication date Feb 7, 2008
- Kiran Padwekar
- G06 - COMPUTING CALCULATING COUNTING

Durgesh Srivastava

Person

Patents Grantslast 30 patents

Network interface controller with eviction cache

Ballooning for multi-tiered pooled memory

Context aware selective backlighting techniques

Ballooning for multi-tiered pooled memory

Tenant based allocation for pooled memory

Context aware selective backlighting techniques

Context aware selective backlighting techniques

Context aware selective backlighting techniques

Multi-core integrated circuit configurable to provide multiple logi...

Disabling portions of memory with defects

Method and apparatus for reducing power consumption in multi-channe...

Supporting un-buffered memory modules on a platform configured for...

Method and system for fast frequency switch for a power throttle in...

Method and system for fast frequency switch for a power throttle in...

Direct cache access in multiple core processors

Method and system for fast frequency switch for a power throttle in...

Method and system for fast frequency switch for a power throttle in...

Patents Applicationslast 30 patents

BALLOONING FOR MULTI-TIERED POOLED MEMORY

METHOD TO MINIMIZE HOT/COLD PAGE DETECTION OVERHEAD ON RUNNING WORK...

CONTEXT AWARE SELECTIVE BACKLIGHTING TECHNIQUES

APPARATUS AND METHOD FOR INTELLIGENT MEMORY PAGE MANAGEMENT

MEMORY POOL MANAGEMENT

APPARATUS, SYSTEM AND METHOD TO SAMPLE PAGE TABLE ENTRY METADATA BE...

APPARATUS, SYSTEM AND METHOD TO SAMPLE PAGE TABLE ENTRY METADATA BE...

MEMORY POOLED TIME SENSITIVE NETWORKING BASED ARCHITECTURES

CONTEXT AWARE SELECTIVE BACKLIGHTING TECHNIQUES

MEMORY THIN PROVISIONING USING MEMORY POOLS

NETWORK INTERFACE CONTROLLER WITH EVICTION CACHE

DIRECT MEMORY ACCESS (DMA) ENGINE WITH NETWORK INTERFACE CAPABILITIES

SHARED MEMORY

PACKET MULTI-CAST FOR MEMORY POOL REPLICATION

PAGE-BASED REMOTE MEMORY ACCESS USING SYSTEM MEMORY INTERFACE NETWO...

MEMORY AND STORAGE POOL INTERFACES

TENANT BASED ALLOCATION FOR POOLED MEMORY

BALLOONING FOR MULTI-TIERED POOLED MEMORY

ADAPTIVE FUNCTION EXECUTION IN A FUNCTION AS A SERVICE (FAAS) ARCHI...

CONTEXT AWARE SELECTIVE BACKLIGHTING TECHNIQUES

CONTEXT AWARE SELECTIVE BACKLIGHTING TECHNIQUES

MULTI-CORE INTEGRATED CIRCUIT CONFIGURABLE TO PROVIDE MULTIPLE LOGI...

CONTROLLING A PROCESSOR CACHE USING A REAL-TIME ATTRIBUTE

DISABLING PORTIONS OF MEMORY WITH DEFECTS

DISABLING PORTIONS OF MEMORY WITH DEFECTS

METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN MULTI-CHANNE...

SUPPORTING UN-BUFFERED MEMORY MODULES ON A PLATFORM CONFIGURED FOR...

Implementing Asynchronous Request for Forcing Dynamic Memory into S...

Direct cache access in multiple core processors

Method and system for fast frequency switch for a power throttle in...