Dwain A. Hicks

Person

Pflugerville, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and systems for optimized translation of a virtual address...
- Patent number 11,409,663
- Issue date Aug 9, 2022
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for incorporating non-tree based address transl...
- Patent number 11,221,963
- Issue date Jan 11, 2022
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing a unified page wa...
- Patent number 11,157,415
- Issue date Oct 26, 2021
- International Business Machines Corporation
- Dwain A. Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual cache mechanism for program break point register exception...
- Patent number 11,061,810
- Issue date Jul 13, 2021
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for optimized translation of a virtual address...
- Patent number 10,915,459
- Issue date Feb 9, 2021
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing exception handlin...
- Patent number 10,824,494
- Issue date Nov 3, 2020
- International Business Machines Corporation
- Dwain A. Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for predicting virtual address
- Patent number 10,740,248
- Issue date Aug 11, 2020
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance optimized congruence class matching for multiple concur...
- Patent number 10,649,778
- Issue date May 12, 2020
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and systems for incorporating non-tree based address transl...
- Patent number 10,621,106
- Issue date Apr 14, 2020
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing a unified page wa...
- Patent number 10,534,715
- Issue date Jan 14, 2020
- International Business Machines Corporation
- Dwain A. Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation of a multi-slice processor implementing exception handlin...
- Patent number 10,042,691
- Issue date Aug 7, 2018
- International Business Machines Corporation
- Dwain A. Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load address dependency mechanism system and method in a high frequ...
- Patent number 7,769,985
- Issue date Aug 3, 2010
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems for executing load instructions that achieve sequential loa...
- Patent number 7,730,290
- Issue date Jun 1, 2010
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of load/store dependencies detection with dynamically changi...
- Patent number 7,464,242
- Issue date Dec 9, 2008
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and systems for executing load instructions that achieve seq...
- Patent number 7,376,816
- Issue date May 20, 2008
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load address dependency mechanism system and method in a high frequ...
- Patent number 7,363,468
- Issue date Apr 22, 2008
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for executing load instructions that avoid orde...
- Patent number 7,302,527
- Issue date Nov 27, 2007
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of updating cache state information where stores only read t...
- Patent number 7,302,530
- Issue date Nov 27, 2007
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for controlling access to external cache memories of differi...
- Patent number 6,604,173
- Issue date Aug 5, 2003
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient store machine in cache based microprocessor
- Patent number 6,446,170
- Issue date Sep 3, 2002
- International Business Machines Corporation
- Kin Shing Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined cache memory deallocation and storeback
- Patent number 6,298,417
- Issue date Oct 2, 2001
- International Business Machines Corporation
- Kin Shing Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated cache buffers
- Patent number 6,240,487
- Issue date May 29, 2001
- International Business Machines Corporation
- Pei-Chun Peter Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for pre-fetch cache interrogation using snoop port
- Patent number 6,202,128
- Issue date Mar 13, 2001
- International Business Machines Corporation
- Kin Shing Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for selectively controlling fetching and prefetch...
- Patent number 6,085,291
- Issue date Jul 4, 2000
- International Business Machines Corporation
- Dwain Alan Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for indicating uncorrectable data errors
- Patent number 5,953,351
- Issue date Sep 14, 1999
- International Business Machines Corporation
- Dwain Alan Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for implementing a cache coherency mechanism for...
- Patent number 5,787,478
- Issue date Jul 28, 1998
- International Business Machines Corporation
- Dwain Alan Hicks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared L2 support for inclusion property in split L1 data and instr...
- Patent number 5,694,573
- Issue date Dec 2, 1997
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance/low cost access hazard detection in pipelined cach...
- Patent number 5,692,151
- Issue date Nov 25, 1997
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical cache arrangement wherein the replacement of an LRU en...
- Patent number 5,584,013
- Issue date Dec 10, 1996
- International Business Machines Corporation
- Hoichi Cheong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor system with shared cache and data input/output circu...
- Patent number 5,581,734
- Issue date Dec 3, 1996
- International Business Machines Corporation
- Michael T. DiBrino
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND SYSTEMS FOR OPTIMIZED TRANSLATION OF A VIRTUAL ADDRESS...
- Publication number 20210049107
- Publication date Feb 18, 2021
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtual Cache Mechanism for Program Break Point Register Exception...
- Publication number 20200272557
- Publication date Aug 27, 2020
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Systems for Predicting Virtual Address
- Publication number 20200192817
- Publication date Jun 18, 2020
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Systems for Incorporating Non-Tree Based Address Transl...
- Publication number 20200183858
- Publication date Jun 11, 2020
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMANCE OPTIMIZED CONGRUENCE CLASS MATCHING FOR MULTIPLE CONCUR...
- Publication number 20200174793
- Publication date Jun 4, 2020
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND SYSTEMS FOR OPTIMIZED TRANSLATION LOOKASIDE BUFFER (TLB...
- Publication number 20200133881
- Publication date Apr 30, 2020
- International Business Machines Corporation
- David Campbell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A UNIFIED PAGE WA...
- Publication number 20200125496
- Publication date Apr 23, 2020
- International Business Machines Corporation
- DWAIN A. HICKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING EXCEPTION HANDLIN...
- Publication number 20180293126
- Publication date Oct 11, 2018
- International Business Machines Corporation
- DWAIN A. HICKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A UNIFIED PAGE WA...
- Publication number 20170308474
- Publication date Oct 26, 2017
- International Business Machines Corporation
- DWAIN A. HICKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING EXCEPTION HANDLIN...
- Publication number 20170308425
- Publication date Oct 26, 2017
- International Business Machines Corporation
- DWAIN A. HICKS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS FOR EXECUTING LOAD INSTRUCTIONS THAT ACHIEVE SEQUENTIAL LOA...
- Publication number 20080148017
- Publication date Jun 19, 2008
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD ADDRESS DEPENDENCY MECHANISM SYSTEM AND METHOD IN A HIGH FREQU...
- Publication number 20080141014
- Publication date Jun 12, 2008
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of load/store dependencies detection with dynamically changi...
- Publication number 20060174083
- Publication date Aug 3, 2006
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for executing load instructions that avoid orde...
- Publication number 20060107021
- Publication date May 18, 2006
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and systems for executing load instructions that achieve seq...
- Publication number 20060106985
- Publication date May 18, 2006
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Load address dependency mechanism system and method in a high frequ...
- Publication number 20060106987
- Publication date May 18, 2006
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of updating cache state information where stores only read t...
- Publication number 20060020759
- Publication date Jan 26, 2006
- International Business Machines Corporation
- Brian David Barrick
- G06 - COMPUTING CALCULATING COUNTING

Dwain A. Hicks

Person

Patents Grantslast 30 patents

Methods and systems for optimized translation of a virtual address...

Methods and systems for incorporating non-tree based address transl...

Operation of a multi-slice processor implementing a unified page wa...

Virtual cache mechanism for program break point register exception...

Methods and systems for optimized translation of a virtual address...

Operation of a multi-slice processor implementing exception handlin...

Methods and systems for predicting virtual address

Performance optimized congruence class matching for multiple concur...

Methods and systems for incorporating non-tree based address transl...

Operation of a multi-slice processor implementing a unified page wa...

Operation of a multi-slice processor implementing exception handlin...

Load address dependency mechanism system and method in a high frequ...

Systems for executing load instructions that achieve sequential loa...

Method of load/store dependencies detection with dynamically changi...

Method and systems for executing load instructions that achieve seq...

Load address dependency mechanism system and method in a high frequ...

Systems and methods for executing load instructions that avoid orde...

Method of updating cache state information where stores only read t...

System for controlling access to external cache memories of differi...

Efficient store machine in cache based microprocessor

Pipelined cache memory deallocation and storeback

Integrated cache buffers

Method and system for pre-fetch cache interrogation using snoop port

System and method for selectively controlling fetching and prefetch...

Method and apparatus for indicating uncorrectable data errors

Method and system for implementing a cache coherency mechanism for...

Shared L2 support for inclusion property in split L1 data and instr...

High performance/low cost access hazard detection in pipelined cach...

Hierarchical cache arrangement wherein the replacement of an LRU en...

Multiprocessor system with shared cache and data input/output circu...

Patents Applicationslast 30 patents

METHODS AND SYSTEMS FOR OPTIMIZED TRANSLATION OF A VIRTUAL ADDRESS...

Virtual Cache Mechanism for Program Break Point Register Exception...

Methods and Systems for Predicting Virtual Address

Methods and Systems for Incorporating Non-Tree Based Address Transl...

PERFORMANCE OPTIMIZED CONGRUENCE CLASS MATCHING FOR MULTIPLE CONCUR...

METHODS AND SYSTEMS FOR OPTIMIZED TRANSLATION LOOKASIDE BUFFER (TLB...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A UNIFIED PAGE WA...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING EXCEPTION HANDLIN...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING A UNIFIED PAGE WA...

OPERATION OF A MULTI-SLICE PROCESSOR IMPLEMENTING EXCEPTION HANDLIN...

SYSTEMS FOR EXECUTING LOAD INSTRUCTIONS THAT ACHIEVE SEQUENTIAL LOA...

LOAD ADDRESS DEPENDENCY MECHANISM SYSTEM AND METHOD IN A HIGH FREQU...

Method of load/store dependencies detection with dynamically changi...

Systems and methods for executing load instructions that avoid orde...

Method and systems for executing load instructions that achieve seq...

Load address dependency mechanism system and method in a high frequ...

Method of updating cache state information where stores only read t...