Edward Armayor McQuade

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Katonah, NY, US

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Patents Grantslast 30 patents

Information Patent Grant
Logical clock connection in an integrated circuit design
- Patent number 12,204,832
- Issue date Jan 21, 2025
- International Business Machines Corporation
- Ali S. El-Zein
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
EARLY POWER ESTIMATION ON A DERIVED PHYSICAL HIERARCHY IN CHIP DESIGN
- Publication number 20240152676
- Publication date May 9, 2024
- International Business Machines Corporation
- Ali S. El-Zein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL CLOCK CONNECTION IN AN INTEGRATED CIRCUIT DESIGN
- Publication number 20230070516
- Publication date Mar 9, 2023
- International Business Machines Corporation
- Ali S. El-Zein
- G06 - COMPUTING CALCULATING COUNTING