Edward L. Hepler

Person

Malvern, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Protocol engine for processing data in a wireless transmit/receive...
- Patent number 9,164,932
- Issue date Oct 20, 2015
- InterDigital Technology Corporaton
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
UMTS FDD modem optimized for high data rate applications
- Patent number 8,996,078
- Issue date Mar 31, 2015
- InterDigital Technology Corporation
- Douglas R. Castor
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Protocol engine for processing data in a wireless transmit/receive...
- Patent number 8,699,434
- Issue date Apr 15, 2014
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for efficient operation of an enhanced dedicat...
- Patent number 8,537,857
- Issue date Sep 17, 2013
- InterDigital Technology Corporation
- Alexander Reznik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Pipeline architecture for maximum a posteriori (MAP) decoders
- Patent number 8,316,285
- Issue date Nov 20, 2012
- InterDigital Technology Corporation
- Edward L. Hepler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
UMTS FDD modem optimized for high data rate applications
- Patent number 8,295,891
- Issue date Oct 23, 2012
- InterDigital Technology Corporation
- Douglas R. Castor
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data-mover controller with plural registers for supporting cipherin...
- Patent number 8,112,635
- Issue date Feb 7, 2012
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Software parameterizable control blocks for use in physical layer p...
- Patent number 8,094,653
- Issue date Jan 10, 2012
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Symbol rate hardware accelerator
- Patent number 8,015,471
- Issue date Sep 6, 2011
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Protocol engine for processing data in a wireless transmit/receive...
- Patent number 7,929,410
- Issue date Apr 19, 2011
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for efficient operation of an enhanced dedicat...
- Patent number 7,916,751
- Issue date Mar 29, 2011
- InterDigital Technology Corporation
- Alexander Reznik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Pipeline architecture for maximum a posteriori (MAP) decoders
- Patent number 7,908,545
- Issue date Mar 15, 2011
- InterDigital Technology Corporation
- Edward Hepler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System for generating pseudorandom sequences
- Patent number 7,643,638
- Issue date Jan 5, 2010
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data-mover controller with plural registers for supporting cipherin...
- Patent number 7,636,857
- Issue date Dec 22, 2009
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Access burst detector correlator pool
- Patent number 7,630,690
- Issue date Dec 8, 2009
- InterDigital Technology Corp.
- John David Kaewell, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Software parameterizable control blocks for use in physical layer p...
- Patent number 7,496,074
- Issue date Feb 24, 2009
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Received communication signal processing methods and components for...
- Patent number 7,433,390
- Issue date Oct 7, 2008
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Components and methods for processing in wireless communication dat...
- Patent number 7,430,234
- Issue date Sep 30, 2008
- InterDigital Technology Corporation
- Alexander Reznik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System for generating pseudorandom sequences
- Patent number 7,248,698
- Issue date Jul 24, 2007
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipeline architecture for maximum a posteriori (MAP) decoders
- Patent number 7,181,670
- Issue date Feb 20, 2007
- InterDigital Technology Corporation
- Edward L. Hepler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Node-B/base station rake finger pooling
- Patent number 7,092,432
- Issue date Aug 15, 2006
- InterDigital Technology Corporation
- John David Kaewell, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Path searcher using reconfigurable correlator sets
- Patent number 7,082,286
- Issue date Jul 25, 2006
- InterDigital Technology Corporation
- John David Kaewell, Jr.
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Components and methods for processing in wireless communication dat...
- Patent number 7,065,126
- Issue date Jun 20, 2006
- InterDigital Technology Corporation
- Alexander Reznik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Pipeline architecture for maximum a posteriori (MAP) decoders
- Patent number 6,961,921
- Issue date Nov 1, 2005
- InterDigital Technology Corporation
- Edward L. Hepler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Node-B/base station rake finger pooling
- Patent number 6,785,322
- Issue date Aug 31, 2004
- InterDigital Technology Corporation
- John David Kaewell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for performing multiple simultaneous error det...
- Patent number 5,432,801
- Issue date Jul 11, 1995
- Commodore Electronics Limited
- Edward Hepler
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND SYSTEMS FOR PACKET DIFFERENTIATION
- Publication number 20150229970
- Publication date Aug 13, 2015
- VID SCALE, INC.
- Liangping Ma
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROTOCOL ENGINE FOR PROCESSING DATA IN A WIRELESS TRANSMIT/RECEIVE...
- Publication number 20140181422
- Publication date Jun 26, 2014
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR EFFICIENT OPERATION OF AN ENHANCED DEDICAT...
- Publication number 20130343287
- Publication date Dec 26, 2013
- InterDigital Technology Corporation
- Alexander Reznik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
UMTS FDD MODEM OPTIMIZED FOR HIGH DATA RATE APPLICATIONS
- Publication number 20130045780
- Publication date Feb 21, 2013
- InterDigital Technology Corporation
- Douglas R. Castor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PIPELINE ARCHITECTURE FOR MAXIMUM A POSTERIORI (MAP) DECODERS
- Publication number 20110271166
- Publication date Nov 3, 2011
- InterDigital Technology Corporation
- Edward L. Hepler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROTOCOL ENGINE FOR PROCESSING DATA IN A WIRELESS TRANSMIT/RECEIVE...
- Publication number 20110191532
- Publication date Aug 4, 2011
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR EFFICIENT OPERATION OF AN ENHANCED DEDICAT...
- Publication number 20110158197
- Publication date Jun 30, 2011
- InterDigital Technology Corporation
- Alexander Reznik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Data-Mover Controller With Plural Registers For Supporting Cipherin...
- Publication number 20100088529
- Publication date Apr 8, 2010
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR CONTENTION-FREE INTERLEAVING USING A SINGL...
- Publication number 20090274248
- Publication date Nov 5, 2009
- INTERDIGITAL PATENT HOLDINGS, INC.
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR COMBINED MEDIUM ACCESS CONTROL AND RADIO L...
- Publication number 20090238124
- Publication date Sep 24, 2009
- InterDigital Technology Corporation
- Ravikumar V. Pragada
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
UMTS FDD MODEM OPTIMIZED FOR HIGH DATA RATE APPLICATIONS
- Publication number 20090203409
- Publication date Aug 13, 2009
- InterDigital Technology Corporation
- Douglas R. Castor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SOFTWARE PARAMETERIZABLE CONTROL BLOCKS FOR USE IN PHYSICAL LAYER P...
- Publication number 20090158008
- Publication date Jun 18, 2009
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECEIVED COMMUNICATION SIGNAL PROCESSING METHODS AND COMPONENTS FOR...
- Publication number 20090131009
- Publication date May 21, 2009
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYMBOL RATE HARDWARE ACCELERATOR
- Publication number 20080016287
- Publication date Jan 17, 2008
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System for generating pseudorandom sequences
- Publication number 20070258593
- Publication date Nov 8, 2007
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Pipeline architecture for maximum a posteriori (MAP) decoders
- Publication number 20070118791
- Publication date May 24, 2007
- InterDigital Technology Corporation
- Edward L. Hepler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for efficient operation of an enhanced dedicat...
- Publication number 20070060142
- Publication date Mar 15, 2007
- InterDigital Technology Corporation
- Alexander Reznik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Protocol engine for processing data in a wireless transmit/receive...
- Publication number 20070014229
- Publication date Jan 18, 2007
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Components and methods for processing in wireless communication dat...
- Publication number 20060203893
- Publication date Sep 14, 2006
- InterDigital Technology Corporation
- Alexander Reznik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
High speed downlink packet access co-processor for upgrading the ca...
- Publication number 20060039330
- Publication date Feb 23, 2006
- InterDigital Technology Corporation
- William C. Hackett
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Pipeline architecture for maximum a posteriori (MAP) decoders
- Publication number 20060005111
- Publication date Jan 5, 2006
- InterDigital Technology Corporation
- Edward L. Hepler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Data-mover controller with plural registers for supporting cipherin...
- Publication number 20050262344
- Publication date Nov 24, 2005
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Received communication signal processing methods and components for...
- Publication number 20040242181
- Publication date Dec 2, 2004
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Node-B/base station Rake finger pooling
- Publication number 20040202228
- Publication date Oct 14, 2004
- InterDigital Technology Corporation
- John David Kaewell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Components and methods for processing in wireless communication dat...
- Publication number 20040165571
- Publication date Aug 26, 2004
- InterDigital Technology Corporation
- Alexander Reznik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Path searcher using reconfigurable correlator sets
- Publication number 20040047439
- Publication date Mar 11, 2004
- InterDigital Technology Corporation
- John David Kaewell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Access burst detector corrrelator pool
- Publication number 20040032839
- Publication date Feb 19, 2004
- InterDigital Technology Corporation
- John David Kaewell
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Software parameterizable control blocks for use in physical layer p...
- Publication number 20040014447
- Publication date Jan 22, 2004
- InterDigital Technology Corporation
- Edward L. Hepler
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Pipeline architecture for maximum a posteriori (MAP) decoders
- Publication number 20030066019
- Publication date Apr 3, 2003
- InterDigital Technology Corporation
- Edward L. Hepler
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System for generating pseudorandom sequences
- Publication number 20020196936
- Publication date Dec 26, 2002
- InterDigital Technology Corporation
- Edward L. Hepler
- G06 - COMPUTING CALCULATING COUNTING

Edward L. Hepler

Person

Patents Grantslast 30 patents

Protocol engine for processing data in a wireless transmit/receive...

UMTS FDD modem optimized for high data rate applications

Protocol engine for processing data in a wireless transmit/receive...

Method and apparatus for efficient operation of an enhanced dedicat...

Pipeline architecture for maximum a posteriori (MAP) decoders

UMTS FDD modem optimized for high data rate applications

Data-mover controller with plural registers for supporting cipherin...

Software parameterizable control blocks for use in physical layer p...

Symbol rate hardware accelerator

Protocol engine for processing data in a wireless transmit/receive...

Method and apparatus for efficient operation of an enhanced dedicat...

Pipeline architecture for maximum a posteriori (MAP) decoders

System for generating pseudorandom sequences

Data-mover controller with plural registers for supporting cipherin...

Access burst detector correlator pool

Software parameterizable control blocks for use in physical layer p...

Received communication signal processing methods and components for...

Components and methods for processing in wireless communication dat...

System for generating pseudorandom sequences

Pipeline architecture for maximum a posteriori (MAP) decoders

Node-B/base station rake finger pooling

Path searcher using reconfigurable correlator sets

Components and methods for processing in wireless communication dat...

Pipeline architecture for maximum a posteriori (MAP) decoders

Node-B/base station rake finger pooling

Method and apparatus for performing multiple simultaneous error det...

Patents Applicationslast 30 patents

METHODS AND SYSTEMS FOR PACKET DIFFERENTIATION

PROTOCOL ENGINE FOR PROCESSING DATA IN A WIRELESS TRANSMIT/RECEIVE...

METHOD AND APPARATUS FOR EFFICIENT OPERATION OF AN ENHANCED DEDICAT...

UMTS FDD MODEM OPTIMIZED FOR HIGH DATA RATE APPLICATIONS

PIPELINE ARCHITECTURE FOR MAXIMUM A POSTERIORI (MAP) DECODERS

PROTOCOL ENGINE FOR PROCESSING DATA IN A WIRELESS TRANSMIT/RECEIVE...

METHOD AND APPARATUS FOR EFFICIENT OPERATION OF AN ENHANCED DEDICAT...

Data-Mover Controller With Plural Registers For Supporting Cipherin...

METHOD AND APPARATUS FOR CONTENTION-FREE INTERLEAVING USING A SINGL...

METHOD AND APPARATUS FOR COMBINED MEDIUM ACCESS CONTROL AND RADIO L...

UMTS FDD MODEM OPTIMIZED FOR HIGH DATA RATE APPLICATIONS

SOFTWARE PARAMETERIZABLE CONTROL BLOCKS FOR USE IN PHYSICAL LAYER P...

RECEIVED COMMUNICATION SIGNAL PROCESSING METHODS AND COMPONENTS FOR...

SYMBOL RATE HARDWARE ACCELERATOR

System for generating pseudorandom sequences

Pipeline architecture for maximum a posteriori (MAP) decoders

Method and apparatus for efficient operation of an enhanced dedicat...

Protocol engine for processing data in a wireless transmit/receive...

Components and methods for processing in wireless communication dat...

High speed downlink packet access co-processor for upgrading the ca...

Pipeline architecture for maximum a posteriori (MAP) decoders

Data-mover controller with plural registers for supporting cipherin...

Received communication signal processing methods and components for...

Node-B/base station Rake finger pooling

Components and methods for processing in wireless communication dat...

Path searcher using reconfigurable correlator sets

Access burst detector corrrelator pool

Software parameterizable control blocks for use in physical layer p...

Pipeline architecture for maximum a posteriori (MAP) decoders

System for generating pseudorandom sequences