Edward M. McCombs

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dynamic way-based variable pipeline architecture for on-chip memory
- Patent number 12,249,400
- Issue date Mar 11, 2025
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic power management for on-chip memory
- Patent number 12,243,622
- Issue date Mar 4, 2025
- ARM Limited
- Edward Martin McCombs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuitry and method
- Patent number 12,174,738
- Issue date Dec 24, 2024
- ARM Limited
- Andrew David Tune
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Burst read with flexible burst length for on-chip memory
- Patent number 12,087,353
- Issue date Sep 10, 2024
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
System control using sparse data
- Patent number 12,072,810
- Issue date Aug 27, 2024
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power-up header circuitry for multi-bank memory
- Patent number 12,068,025
- Issue date Aug 20, 2024
- ARM Limited
- Rahul Mathur
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamically adjustable pipeline for memory access
- Patent number 11,967,360
- Issue date Apr 23, 2024
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
System cache peak power management
- Patent number 11,935,580
- Issue date Mar 19, 2024
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
System control using sparse data
- Patent number 11,803,480
- Issue date Oct 31, 2023
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wordline driver architecture
- Patent number 11,514,979
- Issue date Nov 29, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Grant
System control using sparse data
- Patent number 11,327,896
- Issue date May 10, 2022
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System control using sparse data
- Patent number 10,691,610
- Issue date Jun 23, 2020
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low active power write driver with reduced-power boost circuit
- Patent number 10,553,274
- Issue date Feb 4, 2020
- Apple Inc.
- Edward M. McCombs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low active power write driver with reduced-power boost circuit
- Patent number 10,199,090
- Issue date Feb 5, 2019
- Apple Inc.
- Edward M. McCombs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit power reduction through charge
- Patent number 9,584,122
- Issue date Feb 28, 2017
- Apple Inc.
- Edward M. McCombs
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power estimation in an integrated circuit design flow
- Patent number 9,443,045
- Issue date Sep 13, 2016
- Apple Inc.
- Jason A. Frerich
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Weak bit detection using on-die voltage modulation
- Patent number 9,412,469
- Issue date Aug 9, 2016
- Apple Inc.
- Michael R. Seningen
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including pulse control logic having shared gati...
- Patent number 8,988,107
- Issue date Mar 24, 2015
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Translation lookaside buffer structure including an output comparator
- Patent number 8,949,573
- Issue date Feb 3, 2015
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Variable pre-charge levels for improved cell stability
- Patent number 8,947,963
- Issue date Feb 3, 2015
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory including a reduced leakage wordline driver
- Patent number 8,837,226
- Issue date Sep 16, 2014
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory having isolation units for isolating storage arrays from a s...
- Patent number 8,767,495
- Issue date Jul 1, 2014
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Mechanism for peak power management in a memory
- Patent number 8,649,240
- Issue date Feb 11, 2014
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory having isolation units for isolating storage arrays from a s...
- Patent number 8,570,824
- Issue date Oct 29, 2013
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with a shared I/O including an output data latch having an i...
- Patent number 8,553,472
- Issue date Oct 8, 2013
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Scannable flip-flop with hold time improvements
- Patent number 8,493,119
- Issue date Jul 23, 2013
- Apple Inc.
- Derrick A. Leach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mechanism for peak power management in a memory
- Patent number 8,400,864
- Issue date Mar 19, 2013
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit including pulse control logic having shared gati...
- Patent number 8,358,152
- Issue date Jan 22, 2013
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
System Control Using Sparse Data
- Publication number 20250165404
- Publication date May 22, 2025
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuitry and Method
- Publication number 20250068563
- Publication date Feb 27, 2025
- ARM Limited
- Andrew David Tune
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System Control Using Sparse Data
- Publication number 20250013576
- Publication date Jan 9, 2025
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock Circuitry for Memory Applications
- Publication number 20240290363
- Publication date Aug 29, 2024
- ARM Limited
- Rahul Mathur
- G11 - INFORMATION STORAGE
Information Patent Application
System Control Using Sparse Data
- Publication number 20240111685
- Publication date Apr 4, 2024
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuitry and Method
- Publication number 20240054073
- Publication date Feb 15, 2024
- ARM Limited
- Andrew David Tune
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamic Way-Based Variable Pipeline Architecture for On-Chip Memory
- Publication number 20240055034
- Publication date Feb 15, 2024
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamic Power Management for On-Chip Memory
- Publication number 20240055035
- Publication date Feb 15, 2024
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
Burst Read with Flexible Burst Length for On-Chip Memory
- Publication number 20240055047
- Publication date Feb 15, 2024
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
Self-Repair Memory Techniques
- Publication number 20240029813
- Publication date Jan 25, 2024
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
Power-Up Header Circuitry for Multi-Bank Memory
- Publication number 20240005983
- Publication date Jan 4, 2024
- ARM Limited
- Rahul Mathur
- G11 - INFORMATION STORAGE
Information Patent Application
Bitline Precharge Techniques
- Publication number 20230402092
- Publication date Dec 14, 2023
- ARM Limited
- Rahul Mathur
- G11 - INFORMATION STORAGE
Information Patent Application
System Cache Peak Power Management
- Publication number 20230154526
- Publication date May 18, 2023
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
Dynamically Adjustable Pipeline for Memory Access
- Publication number 20230092241
- Publication date Mar 23, 2023
- ARM Limited
- Edward Martin McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
Wordline Driver Architecture
- Publication number 20220319585
- Publication date Oct 6, 2022
- ARM Limited
- Andy Wangkun Chen
- G11 - INFORMATION STORAGE
Information Patent Application
System Control Using Sparse Data
- Publication number 20220269617
- Publication date Aug 25, 2022
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System Control Using Sparse Data
- Publication number 20200320013
- Publication date Oct 8, 2020
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW ACTIVE POWER WRITE DRIVER WITH REDUCED-POWER BOOST CIRCUIT
- Publication number 20190122721
- Publication date Apr 25, 2019
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM CONTROL USING SPARSE DATA
- Publication number 20190095339
- Publication date Mar 28, 2019
- Apple Inc.
- Michael R. Seningen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW ACTIVE POWER WRITE DRIVER WITH REDUCED-POWER BOOST CIRCUIT
- Publication number 20180082735
- Publication date Mar 22, 2018
- Apple Inc.
- Edward M. McCombs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY ARRAY POWER REDUCTION THROUGH REDUCED SUPPLY VOLTAGE
- Publication number 20170256292
- Publication date Sep 7, 2017
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
WEAK BIT DETECTION USING ON-DIE VOLTAGE MODULATION
- Publication number 20160240266
- Publication date Aug 18, 2016
- Apple Inc.
- Michael R. Seningen
- G11 - INFORMATION STORAGE
Information Patent Application
VARIABLE PRE-CHARGE LEVELS FOR IMPROVED CELL STABILITY
- Publication number 20140198594
- Publication date Jul 17, 2014
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD FOR OPTIMIZING SENSE AMPLIFIER TIMING
- Publication number 20140032201
- Publication date Jan 30, 2014
- Edward M. McCombs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Having Isolation Units For Isolating Storage Arrays From A S...
- Publication number 20140016392
- Publication date Jan 16, 2014
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY HAVING ISOLATION UNITS FOR ISOLATING STORAGE ARRAYS FROM A S...
- Publication number 20130188435
- Publication date Jul 25, 2013
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
MECHANISM FOR PEAK POWER MANAGEMENT IN A MEMORY
- Publication number 20130176798
- Publication date Jul 11, 2013
- Apple Inc.
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH A SHARED I/O INCLUDING AN OUTPUT DATA LATCH HAVING AN I...
- Publication number 20130141988
- Publication date Jun 6, 2013
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE INCLUDING A RETENTION VOLTAGE RESISTOR
- Publication number 20130135955
- Publication date May 30, 2013
- Edward M. McCombs
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit Including Pulse Control Logic Having Shared Gati...
- Publication number 20130106464
- Publication date May 2, 2013
- Apple Inc.
- Edward M. McCombs
- G06 - COMPUTING CALCULATING COUNTING

Edward M. McCombs

Person

Patents Grantslast 30 patents

Dynamic way-based variable pipeline architecture for on-chip memory

Dynamic power management for on-chip memory

Circuitry and method

Burst read with flexible burst length for on-chip memory

System control using sparse data

Power-up header circuitry for multi-bank memory

Dynamically adjustable pipeline for memory access

System cache peak power management

System control using sparse data

Wordline driver architecture

System control using sparse data

System control using sparse data

Low active power write driver with reduced-power boost circuit

Low active power write driver with reduced-power boost circuit

Integrated circuit power reduction through charge

Power estimation in an integrated circuit design flow

Weak bit detection using on-die voltage modulation

Integrated circuit including pulse control logic having shared gati...

Translation lookaside buffer structure including an output comparator

Variable pre-charge levels for improved cell stability

Memory including a reduced leakage wordline driver

Memory having isolation units for isolating storage arrays from a s...

Mechanism for peak power management in a memory

Memory having isolation units for isolating storage arrays from a s...

Memory with a shared I/O including an output data latch having an i...

Scannable flip-flop with hold time improvements

Mechanism for peak power management in a memory

Integrated circuit including pulse control logic having shared gati...

Patents Applicationslast 30 patents

System Control Using Sparse Data

Circuitry and Method

System Control Using Sparse Data

Clock Circuitry for Memory Applications

System Control Using Sparse Data

Circuitry and Method

Dynamic Way-Based Variable Pipeline Architecture for On-Chip Memory

Dynamic Power Management for On-Chip Memory

Burst Read with Flexible Burst Length for On-Chip Memory

Self-Repair Memory Techniques

Power-Up Header Circuitry for Multi-Bank Memory

Bitline Precharge Techniques

System Cache Peak Power Management

Dynamically Adjustable Pipeline for Memory Access

Wordline Driver Architecture

System Control Using Sparse Data

System Control Using Sparse Data

LOW ACTIVE POWER WRITE DRIVER WITH REDUCED-POWER BOOST CIRCUIT

SYSTEM CONTROL USING SPARSE DATA

LOW ACTIVE POWER WRITE DRIVER WITH REDUCED-POWER BOOST CIRCUIT

MEMORY ARRAY POWER REDUCTION THROUGH REDUCED SUPPLY VOLTAGE

WEAK BIT DETECTION USING ON-DIE VOLTAGE MODULATION

VARIABLE PRE-CHARGE LEVELS FOR IMPROVED CELL STABILITY

METHOD FOR OPTIMIZING SENSE AMPLIFIER TIMING

Memory Having Isolation Units For Isolating Storage Arrays From A S...

MEMORY HAVING ISOLATION UNITS FOR ISOLATING STORAGE ARRAYS FROM A S...

MECHANISM FOR PEAK POWER MANAGEMENT IN A MEMORY

MEMORY WITH A SHARED I/O INCLUDING AN OUTPUT DATA LATCH HAVING AN I...

MEMORY DEVICE INCLUDING A RETENTION VOLTAGE RESISTOR

Integrated Circuit Including Pulse Control Logic Having Shared Gati...