Edward T. Grochowski

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Interruptible and restartable matrix multiplication instructions, p...
- Patent number 12,204,898
- Issue date Jan 21, 2025
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for heterogeneous computing
- Patent number 12,135,981
- Issue date Nov 5, 2024
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for a processor architecture
- Patent number 12,130,740
- Issue date Oct 29, 2024
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector friendly instruction format and execution thereof
- Patent number 12,086,594
- Issue date Sep 10, 2024
- Intel Corporation
- Robert C. Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, apparatuses, and methods for chained fused multiply add
- Patent number 12,073,214
- Issue date Aug 27, 2024
- Intel Corporation
- Jesus Corbal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interruptible and restartable matrix multiplication instructions, p...
- Patent number 12,050,912
- Issue date Jul 30, 2024
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector friendly instruction format and execution thereof
- Patent number 11,740,904
- Issue date Aug 29, 2023
- Intel Corporation
- Robert C. Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interruptible and restartable matrix multiplication instructions, p...
- Patent number 11,698,787
- Issue date Jul 11, 2023
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for heterogeneous computing
- Patent number 11,693,691
- Issue date Jul 4, 2023
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, apparatuses, and methods for chained fused multiply add
- Patent number 11,487,541
- Issue date Nov 1, 2022
- Intel Corporation
- Jesus Corbal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for heterogeneous computing
- Patent number 11,416,281
- Issue date Aug 16, 2022
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatuses and methods for a processor architecture
- Patent number 11,294,809
- Issue date Apr 5, 2022
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector friendly instruction format and execution thereof
- Patent number 11,210,096
- Issue date Dec 28, 2021
- Intel Corporation
- Robert C. Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data element comparison processors, methods, systems, and instructions
- Patent number 11,113,053
- Issue date Sep 7, 2021
- Intel Corporation
- Asit K. Mishra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, methods, and apparatuses for heterogeneous computing
- Patent number 11,093,277
- Issue date Aug 17, 2021
- Intel Corporation
- Rajesh M. Sankaran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interruptible and restartable matrix multiplication instructions, p...
- Patent number 11,048,508
- Issue date Jun 29, 2021
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Heterogeneous multiprocessor including scalar and SIMD processors i...
- Patent number 10,891,255
- Issue date Jan 12, 2021
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems, apparatuses, and methods for chained fused multiply add
- Patent number 10,853,065
- Issue date Dec 1, 2020
- Intel Corporation
- Jesus Corbal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector friendly instruction format and execution thereof
- Patent number 10,795,680
- Issue date Oct 6, 2020
- Intel Corporation
- Robert C. Valentine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing power management in a multicore processor
- Patent number 10,775,873
- Issue date Sep 15, 2020
- Intel Corporation
- Victor W. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system to provide user-level multithreading
- Patent number 10,635,438
- Issue date Apr 28, 2020
- Intel Corporation
- Edward Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system to provide user-level multithreading
- Patent number 10,628,153
- Issue date Apr 21, 2020
- Intel Corporation
- Edward Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system to provide user-level multithreading
- Patent number 10,613,858
- Issue date Apr 7, 2020
- Intel Corporation
- Edward Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system to provide user-level multithreading
- Patent number 10,585,667
- Issue date Mar 10, 2020
- Intel Corporation
- Edward Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instructions for manipulating a multi-bit predicate register for pr...
- Patent number 10,579,378
- Issue date Mar 3, 2020
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory-to-memory instructions to accelerate sparse-matrix by dense-...
- Patent number 10,489,063
- Issue date Nov 26, 2019
- Intel Corporation
- Asit K. Mishra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for instruction set based thread execution on a plurality...
- Patent number 10,452,403
- Issue date Oct 22, 2019
- Intel Corporation
- Hong Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for page sizing extension
- Patent number 10,445,244
- Issue date Oct 15, 2019
- Intel Corporation
- Edward Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for page sizing extension
- Patent number 10,445,245
- Issue date Oct 15, 2019
- Intel Corporation
- Edward Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data element comparison processors, methods, systems, and instructions
- Patent number 10,423,411
- Issue date Sep 24, 2019
- Intel Corporation
- Asit K. Mishra
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF
- Publication number 20240427600
- Publication date Dec 26, 2024
- Intel Corporation
- Robert C. VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF
- Publication number 20240061683
- Publication date Feb 22, 2024
- Intel Corporation
- Robert C. VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING
- Publication number 20230418655
- Publication date Dec 28, 2023
- Intel Corporation
- Rajesh M. SANKARAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, P...
- Publication number 20230409318
- Publication date Dec 21, 2023
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, P...
- Publication number 20230350674
- Publication date Nov 2, 2023
- Intel Corporation
- Edward T. GROCHOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR CHAINED FUSED MULTIPLY ADD
- Publication number 20230083705
- Publication date Mar 16, 2023
- Intel Corporation
- JESUS CORBAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE
- Publication number 20220237123
- Publication date Jul 28, 2022
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING
- Publication number 20220164218
- Publication date May 26, 2022
- Intel Corporation
- Rajesh M. SANKARAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF
- Publication number 20220129274
- Publication date Apr 28, 2022
- Intel Corporation
- Robert C. VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION
- Publication number 20210374069
- Publication date Dec 2, 2021
- Intel Corporation
- Edward Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, P...
- Publication number 20210326131
- Publication date Oct 21, 2021
- Edward T. GROCHOWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR CHAINED FUSED MULTIPLY ADD
- Publication number 20210081198
- Publication date Mar 18, 2021
- Intel Corporation
- JESUS CORBAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING
- Publication number 20200401440
- Publication date Dec 24, 2020
- Intel Corporation
- Rajesh M. SANKARAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF
- Publication number 20200394042
- Publication date Dec 17, 2020
- Intel Corporation
- Robert C. VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION
- Publication number 20200242046
- Publication date Jul 30, 2020
- Intel Corporation
- Edward Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA ELEMENT COMPARISON PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS
- Publication number 20200089494
- Publication date Mar 19, 2020
- Intel Corporation
- Asit K. MISHRA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING
- Publication number 20190347125
- Publication date Nov 14, 2019
- Intel Corporation
- Rajesh M. SANKARAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Power Management In A Multicore Processor
- Publication number 20190265777
- Publication date Aug 29, 2019
- Intel Corporation
- Victor W. Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, P...
- Publication number 20190258481
- Publication date Aug 22, 2019
- Intel Corporation
- Edward T. Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF
- Publication number 20190227800
- Publication date Jul 25, 2019
- Intel Corporation
- Robert C. VALENTINE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR CHAINED FUSED MULTIPLY ADD
- Publication number 20190121637
- Publication date Apr 25, 2019
- Intel Corporation
- JESUS CORBAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE
- Publication number 20190012266
- Publication date Jan 10, 2019
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
- Publication number 20180321936
- Publication date Nov 8, 2018
- Intel Corporation
- Edward Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
- Publication number 20180307484
- Publication date Oct 25, 2018
- Ed Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
- Publication number 20180225117
- Publication date Aug 9, 2018
- Ed Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING
- Publication number 20180225118
- Publication date Aug 9, 2018
- Ed Grochowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY-TO-MEMORY INSTRUCTIONS TO ACCELERATE SPARSE-MATRIX BY DENSE-...
- Publication number 20180173437
- Publication date Jun 21, 2018
- Intel Corporation
- Asit K. Mishra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SEQUENCING WITH COHERENT AND NON-COHERENT SUB-SYSTEMS
- Publication number 20180173628
- Publication date Jun 21, 2018
- Intel Corporation
- CHUNHUI ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE
- Publication number 20180165199
- Publication date Jun 14, 2018
- Intel Corporation
- Jason W. Brandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS, APPARATUSES, AND METHODS FOR CHAINED FUSED MULTIPLY ADD
- Publication number 20180113708
- Publication date Apr 26, 2018
- JESUS CORBAL
- G06 - COMPUTING CALCULATING COUNTING

Edward T. Grochowski

Person

Patents Grantslast 30 patents

Interruptible and restartable matrix multiplication instructions, p...

Systems, methods, and apparatuses for heterogeneous computing

Apparatuses and methods for a processor architecture

Vector friendly instruction format and execution thereof

Systems, apparatuses, and methods for chained fused multiply add

Interruptible and restartable matrix multiplication instructions, p...

Vector friendly instruction format and execution thereof

Interruptible and restartable matrix multiplication instructions, p...

Systems, methods, and apparatuses for heterogeneous computing

Systems, apparatuses, and methods for chained fused multiply add

Systems, methods, and apparatuses for heterogeneous computing

Apparatuses and methods for a processor architecture

Vector friendly instruction format and execution thereof

Data element comparison processors, methods, systems, and instructions

Systems, methods, and apparatuses for heterogeneous computing

Interruptible and restartable matrix multiplication instructions, p...

Heterogeneous multiprocessor including scalar and SIMD processors i...

Systems, apparatuses, and methods for chained fused multiply add

Vector friendly instruction format and execution thereof

Performing power management in a multicore processor

Method and system to provide user-level multithreading

Method and system to provide user-level multithreading

Method and system to provide user-level multithreading

Method and system to provide user-level multithreading

Instructions for manipulating a multi-bit predicate register for pr...

Memory-to-memory instructions to accelerate sparse-matrix by dense-...

Mechanism for instruction set based thread execution on a plurality...

Method, system, and apparatus for page sizing extension

Method, system, and apparatus for page sizing extension

Data element comparison processors, methods, systems, and instructions

Patents Applicationslast 30 patents

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING

INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, P...

INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, P...

SYSTEMS, APPARATUSES, AND METHODS FOR CHAINED FUSED MULTIPLY ADD

APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE

SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION

INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, P...

SYSTEMS, APPARATUSES, AND METHODS FOR CHAINED FUSED MULTIPLY ADD

SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

METHOD, SYSTEM, AND APPARATUS FOR PAGE SIZING EXTENSION

DATA ELEMENT COMPARISON PROCESSORS, METHODS, SYSTEMS, AND INSTRUCTIONS

SYSTEMS, METHODS, AND APPARATUSES FOR HETEROGENEOUS COMPUTING

Performing Power Management In A Multicore Processor

INTERRUPTIBLE AND RESTARTABLE MATRIX MULTIPLICATION INSTRUCTIONS, P...

VECTOR FRIENDLY INSTRUCTION FORMAT AND EXECUTION THEREOF

SYSTEMS, APPARATUSES, AND METHODS FOR CHAINED FUSED MULTIPLY ADD

APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE

METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING

METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING

METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING

METHOD AND SYSTEM TO PROVIDE USER-LEVEL MULTITHREADING

MEMORY-TO-MEMORY INSTRUCTIONS TO ACCELERATE SPARSE-MATRIX BY DENSE-...

MEMORY SEQUENCING WITH COHERENT AND NON-COHERENT SUB-SYSTEMS

APPARATUSES AND METHODS FOR A PROCESSOR ARCHITECTURE

SYSTEMS, APPARATUSES, AND METHODS FOR CHAINED FUSED MULTIPLY ADD