TREA

Eiji Minamimura

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  • Takasaki, JP
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Patents Grantslast 30 patents

  • Information Patent Grant

    Bi-MOS PLA
    • Patent number 4,725,745
    • Issue date Feb 16, 1988
    • Hitachi, Ltd.
    • Shizuo Kondo
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    Logic circuit
    • Patent number 4,670,859
    • Issue date Jun 2, 1987
    • Hitachi, Ltd.
    • Makoto Furihata
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    PLA with forward-conduction bipolar "and" array and I.sup.2 L "OR"...
    • Patent number 4,659,947
    • Issue date Apr 21, 1987
    • Hitachi, Ltd.
    • Setsuo Ogura
    • H03 - BASIC ELECTRONIC CIRCUITRY