Elena Salurso

Person

Mascalucia (Catania), IT

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for clock resynchronization
- Patent number 11,962,677
- Issue date Apr 16, 2024
- STMicroelectronics S.r.l.
- Francesco Pappalardo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of detecting FSK-modulated signals, corresponding circuit, d...
- Patent number 10,484,217
- Issue date Nov 19, 2019
- STMicroelectronics Design and Application S.r.o.
- Eusebio Dicola
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and arrangement for cache memory management, related process...
- Patent number 8,078,804
- Issue date Dec 13, 2011
- STMicroelectronics S.r.l.
- Francesco Pappalardo
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Processor architecture with processing clusters providing vector an...
- Patent number 8,060,725
- Issue date Nov 15, 2011
- STMicroelectronics S.r.l.
- Francesco Pappalardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process and system for processing signals arranged in a bayer pattern
- Patent number 7,733,396
- Issue date Jun 8, 2010
- STMicroelectronics S.r.l.
- Francesco Pappalardo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for automatic gain control, for instance in a telecommunicat...
- Patent number 7,447,283
- Issue date Nov 4, 2008
- STMicroelectronics S.r.l.
- Ettore Messina
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Process and device for synchronization and codegroup identification...
- Patent number 7,292,664
- Issue date Nov 6, 2007
- STMicroelectronics S.r.l.
- Francesco Pappalardo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR CLOCK RESYNCHRONIZATION
- Publication number 20230336325
- Publication date Oct 19, 2023
- STMicroelectronics S.r.l
- Francesco Pappalardo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD OF DETECTING FSK-MODULATED SIGNALS, CORRESPONDING CIRCUIT, D...
- Publication number 20180131544
- Publication date May 10, 2018
- STMicroelectronics Design and Application S.r.o.
- Eusebio DICOLA
- G01 - MEASURING TESTING
Information Patent Application
PROCESSOR ARCHITECTURE, FOR INSTANCE FOR MULTIMEDIA APPLICATIONS
- Publication number 20080016319
- Publication date Jan 17, 2008
- STMicroelectronics S.r.l.
- Francesco Pappalardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND ARRANGEMENT FOR CACHE MEMORY MANAGEMENT, RELATED PROCESS...
- Publication number 20080016317
- Publication date Jan 17, 2008
- STMicroelectronics S.r.l.
- Francesco Pappalardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multidimensional processor architecture
- Publication number 20050283587
- Publication date Dec 22, 2005
- Francesco Pappalardo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for automatic gain control, for instance in a telecommunicat...
- Publication number 20050031057
- Publication date Feb 10, 2005
- STMicroelectronics S.r.I.
- Ettore Messina
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Process and system for processing signals arranged in a bayer pattern
- Publication number 20040135908
- Publication date Jul 15, 2004
- STMicroelectronics S.r. I.
- Francesco Pappalardo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Process and device for synchronization and codegroup identification...
- Publication number 20040132471
- Publication date Jul 8, 2004
- STMicroelectronics S.r.l.
- Francesco Pappalardo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Elena Salurso

Person

Patents Grantslast 30 patents

System and method for clock resynchronization

Method of detecting FSK-modulated signals, corresponding circuit, d...

Method and arrangement for cache memory management, related process...

Processor architecture with processing clusters providing vector an...

Process and system for processing signals arranged in a bayer pattern

Method for automatic gain control, for instance in a telecommunicat...

Process and device for synchronization and codegroup identification...

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR CLOCK RESYNCHRONIZATION

METHOD OF DETECTING FSK-MODULATED SIGNALS, CORRESPONDING CIRCUIT, D...

PROCESSOR ARCHITECTURE, FOR INSTANCE FOR MULTIMEDIA APPLICATIONS

METHOD AND ARRANGEMENT FOR CACHE MEMORY MANAGEMENT, RELATED PROCESS...

Multidimensional processor architecture

Method for automatic gain control, for instance in a telecommunicat...

Process and system for processing signals arranged in a bayer pattern

Process and device for synchronization and codegroup identification...