Emilio Yero

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Manufacturing process for separating logic and memory array
- Patent number 10,930,607
- Issue date Feb 23, 2021
- Western Digital Technologies, Inc.
- Hem Takiar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Manufacturing process for separating logic and memory array
- Patent number 10,522,489
- Issue date Dec 31, 2019
- Western Digital Technologies, Inc.
- Hem Takiar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Temperature code circuit with single ramp for calibration and deter...
- Patent number 9,715,913
- Issue date Jul 25, 2017
- SanDisk Technologies LLC
- Jiang Yin
- G05 - CONTROLLING REGULATING
Information Patent Grant
Reducing the impact of interference during programming
- Patent number RE45813
- Issue date Nov 24, 2015
- SanDisk Technologies Inc.
- Dana Lee
- 001 -
Information Patent Grant
Optimized page programming order for non-volatile memory
- Patent number RE45771
- Issue date Oct 20, 2015
- SanDisk Technologies Inc.
- Steven Sprouse
- 001 -
Information Patent Grant
Reducing the impact of interference during programming
- Patent number RE43870
- Issue date Dec 25, 2012
- SanDisk Technologies Inc.
- Dana Lee
- 365 - Static information storage and retrieval
Information Patent Grant
Reducing the impact of interference during programming
- Patent number 8,184,479
- Issue date May 22, 2012
- SanDisk Technologies Inc.
- Dana Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Optimized page programming order for non-volatile memory
- Patent number 8,180,994
- Issue date May 15, 2012
- SanDisk Technologies Inc.
- Steven Sprouse
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing the impact of interference during programming
- Patent number 8,094,492
- Issue date Jan 10, 2012
- SanDisk Technologies Inc.
- Dana Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Use of data latches in cache operations of non-volatile memories
- Patent number 7,936,602
- Issue date May 3, 2011
- SanDisk Corporation
- Yan Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Reducing the impact of interference during programming
- Patent number 7,869,273
- Issue date Jan 11, 2011
- SanDisk Corporation
- Dana Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Use of data latches in cache operations of non-volatile memories
- Patent number 7,577,037
- Issue date Aug 18, 2009
- SanDisk Corporation
- Yan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cycle count storage systems
- Patent number 7,467,253
- Issue date Dec 16, 2008
- SanDisk Corporation
- Emilio Yero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cycle count storage methods
- Patent number 7,451,264
- Issue date Nov 11, 2008
- SanDisk Corporation
- Emilio Yero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Use of data latches in cache operations of non-volatile memories
- Patent number 7,206,230
- Issue date Apr 17, 2007
- SanDisk Corporation
- Yan Li
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MANUFACTURING PROCESS FOR SEPARATING LOGIC AND MEMORY ARRAY
- Publication number 20200126936
- Publication date Apr 23, 2020
- Western Digital Technologies, Inc.
- Hem Takiar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING PROCESS FOR SEPARATING LOGIC AND MEMORY ARRAY
- Publication number 20200006268
- Publication date Jan 2, 2020
- Western Digital Technologies, Inc.
- Hem Takiar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Block Level Local Column Redundancy Methods for Higher Yield
- Publication number 20160124664
- Publication date May 5, 2016
- SANDISK TECHNOLOGIES INC.
- Jagdish Sabde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING THE IMPACT OF INTERFERENCE DURING PROGRAMMING
- Publication number 20110310671
- Publication date Dec 22, 2011
- Dana Lee
- G11 - INFORMATION STORAGE
Information Patent Application
REDUCING THE IMPACT OF INTERFERENCE DURING PROGRAMMING
- Publication number 20110075477
- Publication date Mar 31, 2011
- Dana Lee
- G11 - INFORMATION STORAGE
Information Patent Application
OPTIMIZED PAGE PROGRAMMING ORDER FOR NON-VOLATILE MEMORY
- Publication number 20110010484
- Publication date Jan 13, 2011
- Steven Sprouse
- G11 - INFORMATION STORAGE
Information Patent Application
Use of Data Latches in Cache Operations of Non-Volatile Memories
- Publication number 20090262578
- Publication date Oct 22, 2009
- Yan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING THE IMPACT OF INTERFERENCE DURING PROGRAMMING
- Publication number 20090059660
- Publication date Mar 5, 2009
- Dana Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Cycle count storage systems
- Publication number 20070245067
- Publication date Oct 18, 2007
- Emilio Yero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cycle count storage methods
- Publication number 20070245068
- Publication date Oct 18, 2007
- Emilio Yero
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Use of Data Latches in Cache Operations of Non-Volatile Memories
- Publication number 20070109867
- Publication date May 17, 2007
- Yan Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Use of data latches in cache operations of non-volatile memories
- Publication number 20060221704
- Publication date Oct 5, 2006
- Yan Li
- G06 - COMPUTING CALCULATING COUNTING

Emilio Yero

Person

Patents Grantslast 30 patents

Manufacturing process for separating logic and memory array

Manufacturing process for separating logic and memory array

Temperature code circuit with single ramp for calibration and deter...

Reducing the impact of interference during programming

Optimized page programming order for non-volatile memory

Reducing the impact of interference during programming

Reducing the impact of interference during programming

Optimized page programming order for non-volatile memory

Reducing the impact of interference during programming

Use of data latches in cache operations of non-volatile memories

Reducing the impact of interference during programming

Use of data latches in cache operations of non-volatile memories

Cycle count storage systems

Cycle count storage methods

Use of data latches in cache operations of non-volatile memories

Patents Applicationslast 30 patents

MANUFACTURING PROCESS FOR SEPARATING LOGIC AND MEMORY ARRAY

MANUFACTURING PROCESS FOR SEPARATING LOGIC AND MEMORY ARRAY

Block Level Local Column Redundancy Methods for Higher Yield

REDUCING THE IMPACT OF INTERFERENCE DURING PROGRAMMING

REDUCING THE IMPACT OF INTERFERENCE DURING PROGRAMMING

OPTIMIZED PAGE PROGRAMMING ORDER FOR NON-VOLATILE MEMORY

Use of Data Latches in Cache Operations of Non-Volatile Memories

REDUCING THE IMPACT OF INTERFERENCE DURING PROGRAMMING

Cycle count storage systems

Cycle count storage methods

Use of Data Latches in Cache Operations of Non-Volatile Memories

Use of data latches in cache operations of non-volatile memories