Emre Tuncer

Person

Santa Cruz, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Generating integrated circuit floorplans using neural networks
- Patent number 12,086,516
- Issue date Sep 10, 2024
- Google LLC
- Chian-min Richard Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Leakage screening based on use-case power prediction
- Patent number 11,768,237
- Issue date Sep 26, 2023
- Google LLC
- Emre Tuncer
- G01 - MEASURING TESTING
Information Patent Grant
Generating integrated circuit floorplans using neural networks
- Patent number 11,675,940
- Issue date Jun 13, 2023
- Google LLC
- Chian-min Richard Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Voltage-variation detection under clock fluctuations
- Patent number 11,486,911
- Issue date Nov 1, 2022
- Google LLC
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating integrated circuit floorplans using neural networks
- Patent number 11,100,266
- Issue date Aug 24, 2021
- Google LLC
- Chian-min Richard Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating integrated circuit floorplans using neural networks
- Patent number 10,699,043
- Issue date Jun 30, 2020
- Google LLC
- Chian-min Richard Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lithography aware leakage analysis
- Patent number 9,576,098
- Issue date Feb 21, 2017
- Synopsys, Inc.
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variability-aware scheme for high-performance asynchronous circuit...
- Patent number 8,572,539
- Issue date Oct 29, 2013
- eSilicon Corporation
- Jordi Cortadella
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Lithography aware leakage analysis
- Patent number 8,572,523
- Issue date Oct 29, 2013
- Synopsys, Inc.
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lithography aware timing analysis
- Patent number 8,473,876
- Issue date Jun 25, 2013
- Synopsys, Inc.
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network of tightly coupled performance monitors for determining the...
- Patent number 8,446,224
- Issue date May 21, 2013
- eSilicon Corporation
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variability-aware scheme for asynchronous circuit initialization
- Patent number 7,701,255
- Issue date Apr 20, 2010
- Elastix Corporation
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Aggregate sensitivity for statistical static timing analysis
- Patent number 7,458,049
- Issue date Nov 25, 2008
- Magma Design Automation, Inc.
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduction of cross-talk noise in VLSI circuits
- Patent number 7,058,907
- Issue date Jun 6, 2006
- Magma Design Automation, Inc.
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
GENERATING INTEGRATED CIRCUIT FLOORPLANS USING NEURAL NETWORKS
- Publication number 20230394203
- Publication date Dec 7, 2023
- Google LLC
- Chian-min Richard Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Voltage-Variation Detection Under Clock Fluctuations
- Publication number 20230131119
- Publication date Apr 27, 2023
- Google LLC
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Leakage Screening Based on Use-Case Power Prediction
- Publication number 20220268835
- Publication date Aug 25, 2022
- Google LLC
- Emre Tuncer
- G01 - MEASURING TESTING
Information Patent Application
GENERATING INTEGRATED CIRCUIT FLOORPLANS USING NEURAL NETWORKS
- Publication number 20220043951
- Publication date Feb 10, 2022
- Google LLC
- Chian-min Richard Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Voltage-Variation Detection Under Clock Fluctuations
- Publication number 20210148957
- Publication date May 20, 2021
- Google LLC
- Emre Tuncer
- G01 - MEASURING TESTING
Information Patent Application
GENERATING INTEGRATED CIRCUIT FLOORPLANS USING NEURAL NETWORKS
- Publication number 20200364389
- Publication date Nov 19, 2020
- Google LLC
- Chian-min Richard Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING INTEGRATED CIRCUIT FLOORPLANS USING NEURAL NETWORKS
- Publication number 20200175216
- Publication date Jun 4, 2020
- Google LLC
- Chian-min Richard Ho
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LITHOGRAPHY AWARE LEAKAGE ANALYSIS
- Publication number 20140181762
- Publication date Jun 26, 2014
- SYNOPSYS, INC.
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK OF TIGHTLY COUPLED PERFORMANCE MONITORS FOR DETERMINING THE...
- Publication number 20120013408
- Publication date Jan 19, 2012
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Variability-Aware Asynchronous Scheme Based on Two-Phase Protocols...
- Publication number 20090115488
- Publication date May 7, 2009
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Variability-Aware Scheme for High-Performance Asynchronous Circuit...
- Publication number 20090115503
- Publication date May 7, 2009
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Variability-Aware Asynchronous Scheme for Optimal-Performance Delay...
- Publication number 20090119621
- Publication date May 7, 2009
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Variability-Aware Asynchronous Scheme for High-Performance Delay Ma...
- Publication number 20090119631
- Publication date May 7, 2009
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Variability-Aware Asynchronous Scheme Based on Two-Phase Protocols
- Publication number 20090119622
- Publication date May 7, 2009
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Variability-Aware Scheme for Asynchronous Circuit Initialization
- Publication number 20090115469
- Publication date May 7, 2009
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Variability-Aware Asynchronous Scheme for High-Performance Communic...
- Publication number 20090116597
- Publication date May 7, 2009
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LITHOGRAPHY AWARE TIMING ANALYSIS
- Publication number 20080052653
- Publication date Feb 28, 2008
- Magma Design Automation, Inc.
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LITHOGRAPHY AWARE LEAKAGE ANALYSIS
- Publication number 20080052646
- Publication date Feb 28, 2008
- Magma Design Automation, Inc.
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sensitivity-current-based model for equivalent waveform propagation...
- Publication number 20060112357
- Publication date May 25, 2006
- Shahin Nazarian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reduction of cross-talk noise in VLSI circuits
- Publication number 20040205678
- Publication date Oct 14, 2004
- Emre Tuncer
- G06 - COMPUTING CALCULATING COUNTING

Emre Tuncer

Person

Patents Grantslast 30 patents

Generating integrated circuit floorplans using neural networks

Leakage screening based on use-case power prediction

Generating integrated circuit floorplans using neural networks

Voltage-variation detection under clock fluctuations

Generating integrated circuit floorplans using neural networks

Generating integrated circuit floorplans using neural networks

Lithography aware leakage analysis

Variability-aware scheme for high-performance asynchronous circuit...

Lithography aware leakage analysis

Lithography aware timing analysis

Network of tightly coupled performance monitors for determining the...

Variability-aware scheme for asynchronous circuit initialization

Aggregate sensitivity for statistical static timing analysis

Reduction of cross-talk noise in VLSI circuits

Patents Applicationslast 30 patents

GENERATING INTEGRATED CIRCUIT FLOORPLANS USING NEURAL NETWORKS

Voltage-Variation Detection Under Clock Fluctuations

Leakage Screening Based on Use-Case Power Prediction

GENERATING INTEGRATED CIRCUIT FLOORPLANS USING NEURAL NETWORKS

Voltage-Variation Detection Under Clock Fluctuations

GENERATING INTEGRATED CIRCUIT FLOORPLANS USING NEURAL NETWORKS

GENERATING INTEGRATED CIRCUIT FLOORPLANS USING NEURAL NETWORKS

LITHOGRAPHY AWARE LEAKAGE ANALYSIS

NETWORK OF TIGHTLY COUPLED PERFORMANCE MONITORS FOR DETERMINING THE...

Variability-Aware Asynchronous Scheme Based on Two-Phase Protocols...

Variability-Aware Scheme for High-Performance Asynchronous Circuit...

Variability-Aware Asynchronous Scheme for Optimal-Performance Delay...

Variability-Aware Asynchronous Scheme for High-Performance Delay Ma...

Variability-Aware Asynchronous Scheme Based on Two-Phase Protocols

Variability-Aware Scheme for Asynchronous Circuit Initialization

Variability-Aware Asynchronous Scheme for High-Performance Communic...

LITHOGRAPHY AWARE TIMING ANALYSIS

LITHOGRAPHY AWARE LEAKAGE ANALYSIS

Sensitivity-current-based model for equivalent waveform propagation...

Reduction of cross-talk noise in VLSI circuits