Eng Meow Koon

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Method for packaging circuits
- Patent number 9,484,225
- Issue date Nov 1, 2016
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged microelectronic components with terminals exposed through...
- Patent number 8,637,973
- Issue date Jan 28, 2014
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged semiconductor assemblies and methods for manufacturing suc...
- Patent number 8,629,054
- Issue date Jan 14, 2014
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging circuits
- Patent number 8,555,495
- Issue date Oct 15, 2013
- Micron Technology, Inc.
- Yong Poo Chia
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Apparatus and method for packaging circuits
- Patent number 8,138,617
- Issue date Mar 20, 2012
- Round Rock Research, LLC
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for packaging circuits
- Patent number 8,115,306
- Issue date Feb 14, 2012
- Round Rock Research, LLC
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging circuits
- Patent number 8,065,792
- Issue date Nov 29, 2011
- Micron Technology, Inc.
- Yong Poo Chia
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 8,008,126
- Issue date Aug 30, 2011
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic die packages with leadframes, including leadframe-b...
- Patent number 7,947,529
- Issue date May 24, 2011
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging circuits and packaged circuits
- Patent number 7,712,211
- Issue date May 11, 2010
- Micron Technology, Inc.
- Yong Poo Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 7,679,179
- Issue date Mar 16, 2010
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for packaging circuits
- Patent number 7,675,169
- Issue date Mar 9, 2010
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 7,528,477
- Issue date May 5, 2009
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating packaged die
- Patent number 7,358,154
- Issue date Apr 15, 2008
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 7,276,387
- Issue date Oct 2, 2007
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged microelectronic components
- Patent number 7,195,957
- Issue date Mar 27, 2007
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
In-process semiconductor packages with leadframe grid arrays
- Patent number 7,170,161
- Issue date Jan 30, 2007
- Micron Technology, Inc.
- Chan Min Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Flexible ball grid array chip scale packages
- Patent number 7,115,986
- Issue date Oct 3, 2006
- Micron Technology, Inc.
- Ow Chee Moon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for making semiconductor packages with leadframe grid arrays
- Patent number 6,967,127
- Issue date Nov 22, 2005
- Micron Technology, Inc.
- Chan Min Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 6,949,407
- Issue date Sep 27, 2005
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus and method for packaging circuits
- Patent number 6,894,386
- Issue date May 17, 2005
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Castellation wafer level packaging of integrated circuit chips
- Patent number 6,855,572
- Issue date Feb 15, 2005
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor packages with leadframe grid arrays and components
- Patent number 6,836,008
- Issue date Dec 28, 2004
- Micron Technology, Inc.
- Chan Min Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Packaged microelectronic components
- Patent number 6,836,009
- Issue date Dec 28, 2004
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked-die assemblies with a plurality of microelectronic devices...
- Patent number 6,552,910
- Issue date Apr 22, 2003
- Micron Technology, Inc.
- Ow Chee Moon
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHOD FOR PACKAGING CIRCUITS
- Publication number 20170047231
- Publication date Feb 16, 2017
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PACKAGING CIRCUITS
- Publication number 20140045280
- Publication date Feb 13, 2014
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...
- Publication number 20120241957
- Publication date Sep 27, 2012
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUC...
- Publication number 20120241982
- Publication date Sep 27, 2012
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MA...
- Publication number 20120211896
- Publication date Aug 23, 2012
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PACKAGING CIRCUITS
- Publication number 20120064697
- Publication date Mar 15, 2012
- Yong Poo Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUC...
- Publication number 20110084402
- Publication date Apr 14, 2011
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...
- Publication number 20110068454
- Publication date Mar 24, 2011
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR PACKAGING CIRCUITS AND PACKAGED CIRCUITS
- Publication number 20100146780
- Publication date Jun 17, 2010
- Yong Poo Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR PACKAGING CIRCUITS
- Publication number 20100140794
- Publication date Jun 10, 2010
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
- Publication number 20100068851
- Publication date Mar 18, 2010
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DIE PACKAGES WITH LEADFRAMES, INCLUDING LEADFRAME-B...
- Publication number 20090045489
- Publication date Feb 19, 2009
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...
- Publication number 20090026600
- Publication date Jan 29, 2009
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC IMAGERS AND METHODS FOR MANUFACTURING SUCH MICROELE...
- Publication number 20090014822
- Publication date Jan 15, 2009
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MA...
- Publication number 20090014859
- Publication date Jan 15, 2009
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGED MICROELECTRONIC COMPONENTS
- Publication number 20080067642
- Publication date Mar 20, 2008
- Micron Technology, Inc.
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
- Publication number 20080067675
- Publication date Mar 20, 2008
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS AND METHOD FOR PACKAGING CIRCUITS
- Publication number 20080054423
- Publication date Mar 6, 2008
- Micron Technology, Inc.
- Chia Y. Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor packages having leadframe-based connection arrays
- Publication number 20070120247
- Publication date May 31, 2007
- Chan Min Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and method for packaging circuits
- Publication number 20060084240
- Publication date Apr 20, 2006
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Castellation wafer level packaging of integrated circuit chips
- Publication number 20060014319
- Publication date Jan 19, 2006
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Castellation wafer level packaging of integrated circuit chips
- Publication number 20060008946
- Publication date Jan 12, 2006
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Castellation wafer level packaging of integrated circuit chips
- Publication number 20060006519
- Publication date Jan 12, 2006
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Castellation wafer level packaging of integrated circuit chips
- Publication number 20060001142
- Publication date Jan 5, 2006
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for making semiconductor packages with leadframe grid arrays
- Publication number 20050230808
- Publication date Oct 20, 2005
- Chan Min Yu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS
- Publication number 20050130345
- Publication date Jun 16, 2005
- Micron Technology, Inc.
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus and method for packaging circuits
- Publication number 20050029668
- Publication date Feb 10, 2005
- Micron Technology, Inc.
- Chia Yong Poo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Packaged microelectronic components
- Publication number 20050026325
- Publication date Feb 3, 2005
- Eng Meow Koon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for packaging circuits and packaged circuits
- Publication number 20040221451
- Publication date Nov 11, 2004
- Micron Technology, Inc.
- Yong Poo Chia
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Castellation wafer level packaging of integrated circuit chips
- Publication number 20040043535
- Publication date Mar 4, 2004
- Boon Suan Jeung
- H01 - BASIC ELECTRIC ELEMENTS

Eng Meow Koon

Person

Patents Grantslast 30 patents

Method for packaging circuits

Packaged microelectronic components with terminals exposed through...

Packaged semiconductor assemblies and methods for manufacturing suc...

Method for packaging circuits

Apparatus and method for packaging circuits

Apparatus and method for packaging circuits

Method for packaging circuits

Castellation wafer level packaging of integrated circuit chips

Microelectronic die packages with leadframes, including leadframe-b...

Method for packaging circuits and packaged circuits

Castellation wafer level packaging of integrated circuit chips

Apparatus and method for packaging circuits

Castellation wafer level packaging of integrated circuit chips

Method for fabricating packaged die

Castellation wafer level packaging of integrated circuit chips

Packaged microelectronic components

In-process semiconductor packages with leadframe grid arrays

Flexible ball grid array chip scale packages

Methods for making semiconductor packages with leadframe grid arrays

Castellation wafer level packaging of integrated circuit chips

Apparatus and method for packaging circuits

Castellation wafer level packaging of integrated circuit chips

Semiconductor packages with leadframe grid arrays and components

Packaged microelectronic components

Stacked-die assemblies with a plurality of microelectronic devices...

Patents Applicationslast 30 patents

METHOD FOR PACKAGING CIRCUITS

METHOD FOR PACKAGING CIRCUITS

MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...

PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUC...

INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MA...

METHOD FOR PACKAGING CIRCUITS

PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUC...

MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...

METHOD FOR PACKAGING CIRCUITS AND PACKAGED CIRCUITS

APPARATUS AND METHOD FOR PACKAGING CIRCUITS

CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS

MICROELECTRONIC DIE PACKAGES WITH LEADFRAMES, INCLUDING LEADFRAME-B...

MICROELECTRONIC DIE PACKAGES WITH METAL LEADS, INCLUDING METAL LEAD...

MICROELECTRONIC IMAGERS AND METHODS FOR MANUFACTURING SUCH MICROELE...

INTERCONNECTS FOR PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR MA...

PACKAGED MICROELECTRONIC COMPONENTS

CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS

APPARATUS AND METHOD FOR PACKAGING CIRCUITS

Semiconductor packages having leadframe-based connection arrays

Apparatus and method for packaging circuits

Castellation wafer level packaging of integrated circuit chips

Castellation wafer level packaging of integrated circuit chips

Castellation wafer level packaging of integrated circuit chips

Castellation wafer level packaging of integrated circuit chips

Methods for making semiconductor packages with leadframe grid arrays

CASTELLATION WAFER LEVEL PACKAGING OF INTEGRATED CIRCUIT CHIPS

Apparatus and method for packaging circuits

Packaged microelectronic components

Method for packaging circuits and packaged circuits

Castellation wafer level packaging of integrated circuit chips