Eric A. Karl

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Internal node jumper for memory bit cells
- Patent number 12,224,239
- Issue date Feb 11, 2025
- Intel Corporation
- Smita Shridharan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Uniform layouts for SRAM and register file bit cells
- Patent number 12,171,090
- Issue date Dec 17, 2024
- Intel Corporation
- Zheng Guo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Precise writing of multi-level weights to memory devices for comput...
- Patent number 12,009,026
- Issue date Jun 11, 2024
- Intel Corporation
- Clifford Ong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Internal node jumper for memory bit cells
- Patent number 11,973,032
- Issue date Apr 30, 2024
- Intel Corporation
- Smita Shridharan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Uniform layouts for SRAM and register file bit cells
- Patent number 11,737,253
- Issue date Aug 22, 2023
- Intel Corporation
- Zheng Guo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Internal node jumper for memory bit cells
- Patent number 11,640,939
- Issue date May 2, 2023
- Intel Corporation
- Smita Shridharan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Internal node jumper for memory bit cells
- Patent number 11,205,616
- Issue date Dec 21, 2021
- Intel Corporation
- Smita Shridharan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-bit read-only memory device
- Patent number 11,152,060
- Issue date Oct 19, 2021
- Intel Corporation
- Xiaofei Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Row based memory write assist and active sleep bias
- Patent number 10,957,386
- Issue date Mar 23, 2021
- Intel Corporation
- Zheng Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Row based memory write assist and active sleep bias
- Patent number 10,600,476
- Issue date Mar 24, 2020
- Intel Corporation
- Zheng Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture to communicate signals for operating a static random a...
- Patent number 10,332,893
- Issue date Jun 25, 2019
- Intel Corporation
- Donald W. Nelson
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus for adaptive write assist for memory
- Patent number 10,269,417
- Issue date Apr 23, 2019
- Intel Corporation
- Gururaj K. Shamanna
- G11 - INFORMATION STORAGE
Information Patent Grant
Operation aware auto-feedback SRAM
- Patent number 9,767,890
- Issue date Sep 19, 2017
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Grant
Assist circuit for memory
- Patent number 9,685,208
- Issue date Jun 20, 2017
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Assist circuit for memory
- Patent number 9,355,694
- Issue date May 31, 2016
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power transient voltage collapse apparatus and method for a mem...
- Patent number 9,263,121
- Issue date Feb 16, 2016
- Intel Corporation
- Eric A. Karl
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive and dynamic stability enhancement for memories
- Patent number 8,451,670
- Issue date May 28, 2013
- Intel Corporation
- Pramod Kolar
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS
- Publication number 20250071963
- Publication date Feb 27, 2025
- Intel Corporation
- Zheng GUO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERNAL NODE JUMPER FOR MEMORY BIT CELLS
- Publication number 20240213154
- Publication date Jun 27, 2024
- Intel Corporation
- Smita SHRIDHARAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHANNEL DEPOPULATION FOR FORKSHEET TRANSISTORS
- Publication number 20240164080
- Publication date May 16, 2024
- Intel Corporation
- Peng ZHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS
- Publication number 20230328947
- Publication date Oct 12, 2023
- Intel Corporation
- Zheng GUO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EPITAXIAL LAYERS OF A TRANSISTOR ELECTRICALLY COUPLED WITH A BACKSI...
- Publication number 20230317148
- Publication date Oct 5, 2023
- Intel Corporation
- Clifford ONG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERNAL NODE JUMPER FOR MEMORY BIT CELLS
- Publication number 20230223339
- Publication date Jul 13, 2023
- Intel Corporation
- Smita SHRIDHARAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SRAM WITH DIPOLE DOPANT THRESHOLD VOLTAGE MODULATION FOR GREATER RE...
- Publication number 20230209799
- Publication date Jun 29, 2023
- Intel Corporation
- Clifford Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SRAM WITH NANORIBBON WIDTH MODULATION FOR GREATER READ STABILITY
- Publication number 20230209797
- Publication date Jun 29, 2023
- Intel Corporation
- Clifford Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BINARY-WEIGHTED CAPACITOR CHARGE-SHARING FOR MULTIPLICATION
- Publication number 20220253285
- Publication date Aug 11, 2022
- Intel Corporation
- Yu-Lin Chao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERNAL NODE JUMPER FOR MEMORY BIT CELLS
- Publication number 20220077055
- Publication date Mar 10, 2022
- Intel Corporation
- Smita SHRIDHARAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHANNEL DEPOPULATION FOR FORKSHEET TRANSISTORS
- Publication number 20210408009
- Publication date Dec 30, 2021
- Peng ZHENG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PRECISE WRITING OF MULTI-LEVEL WEIGHTS TO MEMORY DEVICES FOR COMPUT...
- Publication number 20210098059
- Publication date Apr 1, 2021
- Intel Corporation
- Clifford Ong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-BIT READ-ONLY MEMORY DEVICE
- Publication number 20200402574
- Publication date Dec 24, 2020
- Intel Corporation
- Xiaofei Wang
- G11 - INFORMATION STORAGE
Information Patent Application
ROW BASED MEMORY WRITE ASSIST AND ACTIVE SLEEP BIAS
- Publication number 20200286549
- Publication date Sep 10, 2020
- Intel Corporation
- Zheng Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERNAL NODE JUMPER FOR MEMORY BIT CELLS
- Publication number 20200098682
- Publication date Mar 26, 2020
- Intel Corporation
- Smita SHRIDHARAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS
- Publication number 20200058656
- Publication date Feb 20, 2020
- Intel Corporation
- Zheng GUO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ROW BASED MEMORY WRITE ASSIST AND ACTIVE SLEEP BIAS
- Publication number 20190272868
- Publication date Sep 5, 2019
- Intel Corporation
- Zheng Guo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARCHITECTURE TO COMMUNICATE SIGNALS FOR OPERATING A STATIC RANDOM A...
- Publication number 20180219015
- Publication date Aug 2, 2018
- Intel Corporation
- Donald W. NELSON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS FOR ADAPTIVE WRITE ASSIST FOR MEMORY
- Publication number 20170011793
- Publication date Jan 12, 2017
- Intell Corporation
- Gururaj K. SHAMANNA
- G11 - INFORMATION STORAGE
Information Patent Application
ASSIST CIRCUIT FOR MEMORY
- Publication number 20160225419
- Publication date Aug 4, 2016
- Intel Corporation
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
ASSIST CIRCUIT FOR MEMORY
- Publication number 20150279438
- Publication date Oct 1, 2015
- Jaydeep P. Kulkarni
- G11 - INFORMATION STORAGE
Information Patent Application
LOW POWER TRANSIENT VOLTAGE COLLAPSE APPARATUS AND METHOD FOR A MEM...
- Publication number 20140340977
- Publication date Nov 20, 2014
- Eric A. Karl
- G11 - INFORMATION STORAGE
Information Patent Application
OPERATION AWARE AUTO-FEEDBACK SRAM
- Publication number 20140169077
- Publication date Jun 19, 2014
- Pramod Kolar
- G11 - INFORMATION STORAGE
Information Patent Application
Adaptive and Dynamic Stability Enhancement for Memories
- Publication number 20120075938
- Publication date Mar 29, 2012
- Pramod Kolar
- G11 - INFORMATION STORAGE

Eric A. Karl

Person

Patents Grantslast 30 patents

Internal node jumper for memory bit cells

Uniform layouts for SRAM and register file bit cells

Precise writing of multi-level weights to memory devices for comput...

Internal node jumper for memory bit cells

Uniform layouts for SRAM and register file bit cells

Internal node jumper for memory bit cells

Internal node jumper for memory bit cells

Multi-bit read-only memory device

Row based memory write assist and active sleep bias

Row based memory write assist and active sleep bias

Architecture to communicate signals for operating a static random a...

Apparatus for adaptive write assist for memory

Operation aware auto-feedback SRAM

Assist circuit for memory

Assist circuit for memory

Low power transient voltage collapse apparatus and method for a mem...

Adaptive and dynamic stability enhancement for memories

Patents Applicationslast 30 patents

UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS

INTERNAL NODE JUMPER FOR MEMORY BIT CELLS

CHANNEL DEPOPULATION FOR FORKSHEET TRANSISTORS

UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS

EPITAXIAL LAYERS OF A TRANSISTOR ELECTRICALLY COUPLED WITH A BACKSI...

INTERNAL NODE JUMPER FOR MEMORY BIT CELLS

SRAM WITH DIPOLE DOPANT THRESHOLD VOLTAGE MODULATION FOR GREATER RE...

SRAM WITH NANORIBBON WIDTH MODULATION FOR GREATER READ STABILITY

BINARY-WEIGHTED CAPACITOR CHARGE-SHARING FOR MULTIPLICATION

INTERNAL NODE JUMPER FOR MEMORY BIT CELLS

CHANNEL DEPOPULATION FOR FORKSHEET TRANSISTORS

PRECISE WRITING OF MULTI-LEVEL WEIGHTS TO MEMORY DEVICES FOR COMPUT...

MULTI-BIT READ-ONLY MEMORY DEVICE

ROW BASED MEMORY WRITE ASSIST AND ACTIVE SLEEP BIAS

INTERNAL NODE JUMPER FOR MEMORY BIT CELLS

UNIFORM LAYOUTS FOR SRAM AND REGISTER FILE BIT CELLS

ROW BASED MEMORY WRITE ASSIST AND ACTIVE SLEEP BIAS

ARCHITECTURE TO COMMUNICATE SIGNALS FOR OPERATING A STATIC RANDOM A...

APPARATUS FOR ADAPTIVE WRITE ASSIST FOR MEMORY

ASSIST CIRCUIT FOR MEMORY

ASSIST CIRCUIT FOR MEMORY

LOW POWER TRANSIENT VOLTAGE COLLAPSE APPARATUS AND METHOD FOR A MEM...

OPERATION AWARE AUTO-FEEDBACK SRAM

Adaptive and Dynamic Stability Enhancement for Memories