Eric D. Groen

Person

Ames, IA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Domain clock and power activation control circuit to reduce voltage...
- Patent number 12,019,494
- Issue date Jun 25, 2024
- Microsoft Technology Licensing, LLC
- Charles Boecker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct-switching h-bridge current-mode drivers
- Patent number 11,936,353
- Issue date Mar 19, 2024
- Cadence Design Systems, Inc.
- Eric Douglas Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable analog calibration circuit supporting iterative measur...
- Patent number 11,705,890
- Issue date Jul 18, 2023
- Microsoft Technology Licensing, LLC
- Anirban Banerjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adjustment of multi-phase clock system
- Patent number 11,646,724
- Issue date May 9, 2023
- RAMBUS INC.
- Charles Walter Boecker
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adjustment of multi-phase clock system
- Patent number 11,283,435
- Issue date Mar 22, 2022
- RAMBUS INC.
- Charles Walter Boecker
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hybrid driver circuit
- Patent number 9,553,566
- Issue date Jan 24, 2017
- MoSys, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pseudo-supply hybrid driver
- Patent number 8,836,381
- Issue date Sep 16, 2014
- MoSys, Inc.
- Charles W. Boecker
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus to encode and synchronize a serial interface
- Patent number 8,135,037
- Issue date Mar 13, 2012
- MoSys, Inc.
- Charles Boecker
- G11 - INFORMATION STORAGE
Information Patent Grant
MGT/FPGA clock management system
- Patent number 7,885,320
- Issue date Feb 8, 2011
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Analog front-end having built-in equalization and applications thereof
- Patent number 7,830,985
- Issue date Nov 9, 2010
- Xilinx, Inc.
- William C. Black
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of encoding and synchronizing a serial interface
- Patent number 7,599,396
- Issue date Oct 6, 2009
- Magnalynx, Inc.
- Charles Boecker
- G11 - INFORMATION STORAGE
Information Patent Grant
Analog front-end having built-in equalization and applications thereof
- Patent number 7,480,347
- Issue date Jan 20, 2009
- Xilinx, Inc.
- William C. Black
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable logic device including programmable multi-gigabit tran...
- Patent number 7,406,118
- Issue date Jul 29, 2008
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable on chip regulators with bypass
- Patent number 7,313,176
- Issue date Dec 25, 2007
- Xilinx, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Receiver termination network and application thereof
- Patent number 7,280,590
- Issue date Oct 9, 2007
- Xilinx, Inc.
- Charles W. Boecker
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
DAC based driver with selectable pre-emphasis signal levels
- Patent number 7,227,375
- Issue date Jun 5, 2007
- Xilinx Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High frequency latch
- Patent number 7,196,545
- Issue date Mar 27, 2007
- Xilinx, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory system and memory device having a serial interface
- Patent number 7,167,410
- Issue date Jan 23, 2007
- Magnalynx
- Charles Boecker
- G11 - INFORMATION STORAGE
Information Patent Grant
High frequency XOR with peaked load stage
- Patent number 7,142,014
- Issue date Nov 28, 2006
- Xilinx, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable serializing data path
- Patent number 7,116,251
- Issue date Oct 3, 2006
- Xilinx, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and circuit for reducing VCO noise
- Patent number 7,109,809
- Issue date Sep 19, 2006
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Testing of a multi-gigabit transceiver
- Patent number 7,047,457
- Issue date May 16, 2006
- Xilinx, Inc.
- William C. Black
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable serializing data path
- Patent number 7,015,838
- Issue date Mar 21, 2006
- Xilinx, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
DAC based driver with selectable pre-emphasis signal levels
- Patent number 6,975,132
- Issue date Dec 13, 2005
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated circuit with auto negotiation
- Patent number 6,976,102
- Issue date Dec 13, 2005
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ring oscillator with peaking stages
- Patent number 6,956,442
- Issue date Oct 18, 2005
- Xilinx, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-biasing for common gate amplifier
- Patent number 6,882,224
- Issue date Apr 19, 2005
- Xilinx, Inc.
- Michael J. Gaboury
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Tx line driver with common mode idle state and selectable slew rates
- Patent number 6,870,390
- Issue date Mar 22, 2005
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Correction of duty-cycle distortion in communications and other cir...
- Patent number 6,690,202
- Issue date Feb 10, 2004
- Xilinx, Inc.
- Eric Douglas Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Process compensated phase locked loop
- Patent number 6,683,502
- Issue date Jan 27, 2004
- Xilinx, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
DOMAIN CLOCK AND POWER ACTIVATION CONTROL CIRCUIT TO REDUCE VOLTAGE...
- Publication number 20240004449
- Publication date Jan 4, 2024
- Microsoft Technology Licensing, LLC
- Charles BOECKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE ANALOG CALIBRATION CIRCUIT SUPPORTING ITERATIVE MEASUR...
- Publication number 20230060647
- Publication date Mar 2, 2023
- Microsoft Technology Licensing, LLC
- Anirban BANERJEE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTMENT OF MULTI-PHASE CLOCK SYSTEM
- Publication number 20220337232
- Publication date Oct 20, 2022
- Rambus Inc.
- Charles Walter BOECKER
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Direct-Switching H-Bridge Current-Mode Drivers
- Publication number 20210305956
- Publication date Sep 30, 2021
- Rambus Inc.
- Eric Douglas Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ADJUSTMENT OF MULTI-PHASE CLOCK SYSTEM
- Publication number 20200204166
- Publication date Jun 25, 2020
- RAMBUS INC.
- Charles Walter BOECKER
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HYBRID DRIVER CIRCUIT
- Publication number 20160164498
- Publication date Jun 9, 2016
- MoSys, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Pseudo-Supply Hybrid Driver
- Publication number 20130342241
- Publication date Dec 26, 2013
- MoSys, Inc.
- Charles W. Boecker
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS TO ENCODE AND SYNCHRONIZE A SERIAL INTERFACE
- Publication number 20090316728
- Publication date Dec 24, 2009
- MagnaLynx, Inc.
- Charles Boecker
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ANALOG FRONT-END HAVING BUILT-IN EQUALIZATION AND APPLICATIONS THEREOF
- Publication number 20090116585
- Publication date May 7, 2009
- Xilinx, Inc.
- William C. Black
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method of encoding and synchronizing a serial interface
- Publication number 20070008992
- Publication date Jan 11, 2007
- MagnaLynx, Inc.
- Charles Boecker
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory system and memory device having a serial interface
- Publication number 20060239107
- Publication date Oct 26, 2006
- MagnaLynx, Inc.
- Charles Boecker
- G11 - INFORMATION STORAGE
Information Patent Application
DAC based driver with selectable pre-emphasis signal levels
- Publication number 20060006901
- Publication date Jan 12, 2006
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Programmable logic device including programmable multi-gigabit tran...
- Publication number 20050058187
- Publication date Mar 17, 2005
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Ring oscillator with peaking stages
- Publication number 20050057315
- Publication date Mar 17, 2005
- Xilinx, Inc.
- Eric D. Groen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Analog front-end having built-in equalization and applications thereof
- Publication number 20050058222
- Publication date Mar 17, 2005
- Xilinx, Inc.
- William C. Black
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TX LINE DRIVER WITH COMMON MODE IDLE STATE AND SELECTABLE SLEW RATES
- Publication number 20050057274
- Publication date Mar 17, 2005
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DAC BASED DRIVER WITH SELECTABLE PRE-EMPHASIS SIGNAL LEVELS
- Publication number 20050057280
- Publication date Mar 17, 2005
- Xilinx, Inc.
- Eric D. Groen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Eric D. Groen

Person

Patents Grantslast 30 patents

Domain clock and power activation control circuit to reduce voltage...

Direct-switching h-bridge current-mode drivers

Programmable analog calibration circuit supporting iterative measur...

Adjustment of multi-phase clock system

Adjustment of multi-phase clock system

Hybrid driver circuit

Pseudo-supply hybrid driver

Method and apparatus to encode and synchronize a serial interface

MGT/FPGA clock management system

Analog front-end having built-in equalization and applications thereof

Method of encoding and synchronizing a serial interface

Analog front-end having built-in equalization and applications thereof

Programmable logic device including programmable multi-gigabit tran...

Programmable on chip regulators with bypass

Receiver termination network and application thereof

DAC based driver with selectable pre-emphasis signal levels

High frequency latch

Memory system and memory device having a serial interface

High frequency XOR with peaked load stage

Programmable serializing data path

Method and circuit for reducing VCO noise

Testing of a multi-gigabit transceiver

Programmable serializing data path

DAC based driver with selectable pre-emphasis signal levels

Integrated circuit with auto negotiation

Ring oscillator with peaking stages

Self-biasing for common gate amplifier

Tx line driver with common mode idle state and selectable slew rates

Correction of duty-cycle distortion in communications and other cir...

Process compensated phase locked loop

Patents Applicationslast 30 patents

DOMAIN CLOCK AND POWER ACTIVATION CONTROL CIRCUIT TO REDUCE VOLTAGE...

PROGRAMMABLE ANALOG CALIBRATION CIRCUIT SUPPORTING ITERATIVE MEASUR...

ADJUSTMENT OF MULTI-PHASE CLOCK SYSTEM

Direct-Switching H-Bridge Current-Mode Drivers

ADJUSTMENT OF MULTI-PHASE CLOCK SYSTEM

HYBRID DRIVER CIRCUIT

Pseudo-Supply Hybrid Driver

METHOD AND APPARATUS TO ENCODE AND SYNCHRONIZE A SERIAL INTERFACE

ANALOG FRONT-END HAVING BUILT-IN EQUALIZATION AND APPLICATIONS THEREOF

Method of encoding and synchronizing a serial interface

Memory system and memory device having a serial interface

DAC based driver with selectable pre-emphasis signal levels

Programmable logic device including programmable multi-gigabit tran...

Ring oscillator with peaking stages

Analog front-end having built-in equalization and applications thereof

TX LINE DRIVER WITH COMMON MODE IDLE STATE AND SELECTABLE SLEW RATES

DAC BASED DRIVER WITH SELECTABLE PRE-EMPHASIS SIGNAL LEVELS