Eric DeLano

Person

Ft Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method, system, and apparatus for dynamic reconfiguration of resources
- Patent number 9,798,556
- Issue date Oct 24, 2017
- Intel Corporation
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual shared cache mechanism in a processing device
- Patent number 9,792,212
- Issue date Oct 17, 2017
- Intel Corporation
- Yen-Cheng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for dynamic reconfiguration of resources
- Patent number 9,223,738
- Issue date Dec 29, 2015
- Intel Corporation
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power gating a portion of a cache memory
- Patent number 9,183,144
- Issue date Nov 10, 2015
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power gating a portion of a cache memory
- Patent number 9,176,875
- Issue date Nov 3, 2015
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory mirroring and migration at home agent
- Patent number 8,799,586
- Issue date Aug 5, 2014
- Intel Corporation
- Ganesh Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controllably exiting an unknown state of a cache coherency directory
- Patent number 8,782,347
- Issue date Jul 15, 2014
- Intel Corporation
- Ganesh Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for dynamic reconfiguration of resources
- Patent number 8,327,113
- Issue date Dec 4, 2012
- Intel Corporation
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Home agent data and memory management
- Patent number 8,327,228
- Issue date Dec 4, 2012
- Intel Corporation
- Ganesh Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mitigating context switch cache miss penalty
- Patent number 8,219,780
- Issue date Jul 10, 2012
- Hewlett-Packard Development Company, L.P.
- James R. Callister
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for dynamic reconfiguration of resources
- Patent number 8,171,121
- Issue date May 1, 2012
- Intel Corporation
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system resource access control
- Patent number 7,930,539
- Issue date Apr 19, 2011
- Hewlett-Packard Development Company, L.P.
- Donald C. Soltis, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for dynamic reconfiguration of resources
- Patent number 7,734,741
- Issue date Jun 8, 2010
- Intel Corporation
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interleave mechanism for a computing environment
- Patent number 7,451,260
- Issue date Nov 11, 2008
- Hewlett-Packard Development Company, L.P.
- Christopher L. Lyles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor-architecture for facilitating a virtual machine monitor
- Patent number 7,421,689
- Issue date Sep 2, 2008
- Hewlett-Packard Development Company, L.P.
- Jonathan K. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-cluster processor for processing instructions of one or more...
- Patent number 7,398,374
- Issue date Jul 8, 2008
- Hewlett-Packard Development Company, L.P.
- Eric DeLano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Band configuration agent for link based computing system
- Patent number 7,370,135
- Issue date May 6, 2008
- Intel Corporation
- Eric Delano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timeout event trigger generation
- Patent number 7,310,751
- Issue date Dec 18, 2007
- Hewlett-Packard Development Company, L.P.
- Michael Tayler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Lockstep error signaling
- Patent number 7,296,181
- Issue date Nov 13, 2007
- Hewlett-Packard Development Company, L.P.
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Core-level processor lockstepping
- Patent number 7,290,169
- Issue date Oct 30, 2007
- Hewlett-Packard Development Company, L.P.
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Off-chip lockstep checking
- Patent number 7,237,144
- Issue date Jun 26, 2007
- Hewlett-Packard Development Company, L.P.
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Core parallel execution with different optimization characteristics...
- Patent number 7,028,167
- Issue date Apr 11, 2006
- Hewlett-Packard Development Company, L.P.
- Donald C. Soltis, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Checkpointing of register file
- Patent number 6,941,489
- Issue date Sep 6, 2005
- Hewlett-Packard Development Company, L.P.
- Eric DeLano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and methods for sharing cache among processors
- Patent number 6,931,489
- Issue date Aug 16, 2005
- Hewlett-Packard Development Company, L.P.
- Eric DeLano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multidispatch CPU integrated circuit having virtualized and modular...
- Patent number 6,895,497
- Issue date May 17, 2005
- Hewlett-Packard Development Company, L.P.
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable crossbar and related methods
- Patent number 6,820,167
- Issue date Nov 16, 2004
- Hewlett-Packard Development Company, L.P.
- Samuel David Naffziger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for early tag accesses for lower-level caches in...
- Patent number 6,427,188
- Issue date Jul 30, 2002
- Hewlett-Packard Company
- Terry L Lyon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for checking cache coherency in a computer arc...
- Patent number 6,049,851
- Issue date Apr 11, 2000
- Hewlett-Packard Company
- William R. Bryg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Software assisted hardware TLB miss handler
- Patent number 5,787,494
- Issue date Jul 28, 1998
- Hewlett-Packard Company
- Eric R. DeLano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for selecting and buffering even and odd instruct...
- Patent number 5,617,549
- Issue date Apr 1, 1997
- Hewlett-Packard Co.
- Eric R. DeLano
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method, System, and Apparatus for Dynamic Reconfiguration of Resources
- Publication number 20160196153
- Publication date Jul 7, 2016
- Intel Corporation
- MANI AYYAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtual Shared Cache Mechanism in a Processing Device
- Publication number 20160077970
- Publication date Mar 17, 2016
- Intel Corporation
- Yen-Cheng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
- Publication number 20140189239
- Publication date Jul 3, 2014
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Gating A Portion Of A Cache Memory
- Publication number 20140173206
- Publication date Jun 19, 2014
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Gating A Portion Of A Cache Memory
- Publication number 20140173207
- Publication date Jun 19, 2014
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, System, and Apparatus for Dynamic Reconfiguration of Resources
- Publication number 20130304957
- Publication date Nov 14, 2013
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MIRRORING AND MIGRATION AT HOME AGENT
- Publication number 20110078384
- Publication date Mar 31, 2011
- Ganesh Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HOME AGENT DATA AND MEMORY MANAGEMENT
- Publication number 20110078492
- Publication date Mar 31, 2011
- Ganesh Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controllably Exiting An Unknown State Of A Cache Coherency Directory
- Publication number 20100332767
- Publication date Dec 30, 2010
- Ganesh Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, System, and Apparatus for Dynamic Reconfiguration of Resources
- Publication number 20090055600
- Publication date Feb 26, 2009
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, System, and Apparatus for Dynamic Reconfiguration of Resources
- Publication number 20090024715
- Publication date Jan 22, 2009
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, System, and Apparatus for Dynamic Reconfiguration of Resources
- Publication number 20090019267
- Publication date Jan 15, 2009
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interleave mechanism for a computing environment
- Publication number 20080162774
- Publication date Jul 3, 2008
- Christopher L. Lyles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Band configuration agent for link based computing system
- Publication number 20070118678
- Publication date May 24, 2007
- Eric Delano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mitigating context switch cache miss penalty
- Publication number 20070067602
- Publication date Mar 22, 2007
- James R. Callister
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for dynamic reconfiguration of resources
- Publication number 20060184480
- Publication date Aug 17, 2006
- Mani Ayyar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer system resource access control
- Publication number 20060031679
- Publication date Feb 9, 2006
- Donald C. Soltis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Resource protection in a computer system with direct hardware resou...
- Publication number 20060031672
- Publication date Feb 9, 2006
- Donald C. Soltis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Core-level processor lockstepping
- Publication number 20050240811
- Publication date Oct 27, 2005
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Lockstep error signaling
- Publication number 20050240829
- Publication date Oct 27, 2005
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Off-chip lockstep checking
- Publication number 20050240810
- Publication date Oct 27, 2005
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Timeout event trigger generation
- Publication number 20050188277
- Publication date Aug 25, 2005
- Michael Tayler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error detection method and system for processors that employ altern...
- Publication number 20050138478
- Publication date Jun 23, 2005
- Kevin D. Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error detection method and system for processors that employs locks...
- Publication number 20050108509
- Publication date May 19, 2005
- Kevin D. Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor-architecture for facilitating a virtual machine monitor
- Publication number 20050091652
- Publication date Apr 28, 2005
- Jonathan K. Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and methods for linking a processor and cache
- Publication number 20040225830
- Publication date Nov 11, 2004
- Eric DeLano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and methods for sharing cache among processors
- Publication number 20040030845
- Publication date Feb 12, 2004
- Eric DeLano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable crossbar and related methods
- Publication number 20030217221
- Publication date Nov 20, 2003
- Samuel David Naffziger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multidispatch cpu integrated circuit having virtualized and modular...
- Publication number 20030172250
- Publication date Sep 11, 2003
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Core parallel execution with different optimization characteristics...
- Publication number 20030167389
- Publication date Sep 4, 2003
- Donald C. Soltis
- G06 - COMPUTING CALCULATING COUNTING

Eric DeLano

Person

Patents Grantslast 30 patents

Method, system, and apparatus for dynamic reconfiguration of resources

Virtual shared cache mechanism in a processing device

Method, system, and apparatus for dynamic reconfiguration of resources

Power gating a portion of a cache memory

Power gating a portion of a cache memory

Memory mirroring and migration at home agent

Controllably exiting an unknown state of a cache coherency directory

Method, system, and apparatus for dynamic reconfiguration of resources

Home agent data and memory management

Mitigating context switch cache miss penalty

Method, system, and apparatus for dynamic reconfiguration of resources

Computer system resource access control

Method, system, and apparatus for dynamic reconfiguration of resources

Interleave mechanism for a computing environment

Processor-architecture for facilitating a virtual machine monitor

Multi-cluster processor for processing instructions of one or more...

Band configuration agent for link based computing system

Timeout event trigger generation

Lockstep error signaling

Core-level processor lockstepping

Off-chip lockstep checking

Core parallel execution with different optimization characteristics...

Checkpointing of register file

Apparatus and methods for sharing cache among processors

Multidispatch CPU integrated circuit having virtualized and modular...

Configurable crossbar and related methods

Method and system for early tag accesses for lower-level caches in...

Method and apparatus for checking cache coherency in a computer arc...

Software assisted hardware TLB miss handler

System and method for selecting and buffering even and odd instruct...

Patents Applicationslast 30 patents

Method, System, and Apparatus for Dynamic Reconfiguration of Resources

Virtual Shared Cache Mechanism in a Processing Device

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

Power Gating A Portion Of A Cache Memory

Power Gating A Portion Of A Cache Memory

Method, System, and Apparatus for Dynamic Reconfiguration of Resources

MEMORY MIRRORING AND MIGRATION AT HOME AGENT

HOME AGENT DATA AND MEMORY MANAGEMENT

Controllably Exiting An Unknown State Of A Cache Coherency Directory

Method, System, and Apparatus for Dynamic Reconfiguration of Resources

Method, System, and Apparatus for Dynamic Reconfiguration of Resources

Method, System, and Apparatus for Dynamic Reconfiguration of Resources

Interleave mechanism for a computing environment

Band configuration agent for link based computing system

Mitigating context switch cache miss penalty

Method, system, and apparatus for dynamic reconfiguration of resources

Computer system resource access control

Resource protection in a computer system with direct hardware resou...

Core-level processor lockstepping

Lockstep error signaling

Off-chip lockstep checking

Timeout event trigger generation

Error detection method and system for processors that employ altern...

Error detection method and system for processors that employs locks...

Processor-architecture for facilitating a virtual machine monitor

Apparatus and methods for linking a processor and cache

Apparatus and methods for sharing cache among processors

Configurable crossbar and related methods

Multidispatch cpu integrated circuit having virtualized and modular...

Core parallel execution with different optimization characteristics...