Eric Fetzer

Person

Loveland, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Managing power consumption in a multi-core processor
- Patent number 9,075,614
- Issue date Jul 7, 2015
- Intel Corporation
- Eric Fetzer
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Managing power consumption in a multi-core processor
- Patent number 9,069,555
- Issue date Jun 30, 2015
- Intel Corporation
- Eric Fetzer
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
System and method for dynamically varying a clock signal
- Patent number 7,394,301
- Issue date Jul 1, 2008
- Hewlett-Packard Development Company, L.P.
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System to temporarily modify an output waveform
- Patent number 7,199,611
- Issue date Apr 3, 2007
- Hewlett-Packard Development Company, L.P.
- Samuel D. Naffziger
- G01 - MEASURING TESTING
Information Patent Grant
Receiver and method for mitigating temporary logic transitions
- Patent number 7,200,821
- Issue date Apr 3, 2007
- Hewlett-Packard Development Company, L.P.
- Lei Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for measuring current
- Patent number 7,123,104
- Issue date Oct 17, 2006
- Hewlett-Packard Development Company, L.P.
- Christopher J. Bostak
- G01 - MEASURING TESTING
Information Patent Grant
Register renaming to reduce bypass and increase apparent physical r...
- Patent number 6,944,751
- Issue date Sep 13, 2005
- Hewlett-Packard Development Company, L.P.
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for dynamically varying a clock signal
- Patent number 6,927,605
- Issue date Aug 9, 2005
- Hewlett-Packard Development Company, L.P.
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multidispatch CPU integrated circuit having virtualized and modular...
- Patent number 6,895,497
- Issue date May 17, 2005
- Hewlett-Packard Development Company, L.P.
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuit for measuring on-chip, cycle-to-cycle clock jitter
- Patent number 6,841,985
- Issue date Jan 11, 2005
- Hewlett-Packard Development Company, L.P.
- Eric S. Fetzer
- G01 - MEASURING TESTING
Information Patent Grant
Mechanism for data forwarding
- Patent number 6,707,831
- Issue date Mar 16, 2004
- Hewlett-Packard Development Company, L.P.
- Eric S Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing average power in RAMs by dynamica...
- Patent number 6,665,227
- Issue date Dec 16, 2003
- Hewlett-Packard Development Company, L.P.
- Eric S Fetzer
- G11 - INFORMATION STORAGE
Information Patent Grant
Adapting VLSI clocking to short term voltage transients
- Patent number 6,586,971
- Issue date Jul 1, 2003
- Hewlett-Packard Development Company, L.P.
- Samuel Naffziger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for reducing average power in memory arrays by...
- Patent number 6,515,935
- Issue date Feb 4, 2003
- Hewlett-Packard Company
- Eric S Fetzer
- G11 - INFORMATION STORAGE
Information Patent Grant
Large input function replaying dynamic entry latch with static and...
- Patent number 6,388,489
- Issue date May 14, 2002
- Hewlett-Packard Company
- Eric S Fetzer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Storage cell on integrated circuit responsive to plural frequency c...
- Patent number 6,359,830
- Issue date Mar 19, 2002
- Hewlett-Packard Company
- Eric S Fetzer
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Control Apparatus, Device, Method and Computer Program for Determin...
- Publication number 20220011795
- Publication date Jan 13, 2022
- Intel Corporation
- Michael RIFANI
- G01 - MEASURING TESTING
Information Patent Application
MANAGING POWER CONSUMPTION IN A MULTI-CORE PROCESSOR
- Publication number 20130232368
- Publication date Sep 5, 2013
- ERIC FETZER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Managing Power Consumption In A Multi-Core Processor
- Publication number 20120254643
- Publication date Oct 4, 2012
- Eric Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Receiver and method for mitigating temporary logic transitions
- Publication number 20050270082
- Publication date Dec 8, 2005
- Lei Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for dynamically varying a clock signal
- Publication number 20050231259
- Publication date Oct 20, 2005
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for dynamically varying a clock signal
- Publication number 20050099210
- Publication date May 12, 2005
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power estimation based on power characterizations of non-convention...
- Publication number 20050050494
- Publication date Mar 3, 2005
- Tyson R. McGuffin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System toTemporarily Modify an Output Waveform
- Publication number 20050040870
- Publication date Feb 24, 2005
- Samuel D. Naffziger
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
System and method for measuring current
- Publication number 20050040901
- Publication date Feb 24, 2005
- Christopher J. Bostak
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND CIRCUIT FOR MEASURING ON-CHIP, CYCLE-TO-CYCLE CLOCK JITTER
- Publication number 20050024037
- Publication date Feb 3, 2005
- Eric S. Fetzer
- G01 - MEASURING TESTING
Information Patent Application
System and method for evaluating the speed of a circuit
- Publication number 20050007154
- Publication date Jan 13, 2005
- Benjamin J. Patella
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and circuit for reducing silent data corruption in storage a...
- Publication number 20040148559
- Publication date Jul 29, 2004
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mechanism for data forwarding
- Publication number 20040062240
- Publication date Apr 1, 2004
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multidispatch cpu integrated circuit having virtualized and modular...
- Publication number 20030172250
- Publication date Sep 11, 2003
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register renaming to reduce bypass and increase apparent physical r...
- Publication number 20030163672
- Publication date Aug 28, 2003
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dynamically adjustable cache size based on application behavior to...
- Publication number 20030145239
- Publication date Jul 31, 2003
- Wayne D. Kever
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Simplified cache hierarchy by using multiple tags and entries into...
- Publication number 20030145171
- Publication date Jul 31, 2003
- Eric S. Fetzer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTING VLSI CLOCKING TO SHORT TERM VOLTAGE TRANSIENTS
- Publication number 20030112038
- Publication date Jun 19, 2003
- Samuel Naffziger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for reducing average power and increasing cach...
- Publication number 20030076729
- Publication date Apr 24, 2003
- Eric S. Fetzer
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for reducing average power in RAMs by dynamica...
- Publication number 20030076701
- Publication date Apr 24, 2003
- Eric S. Fetzer
- G11 - INFORMATION STORAGE

Eric Fetzer

Person

Patents Grantslast 30 patents

Managing power consumption in a multi-core processor

Managing power consumption in a multi-core processor

System and method for dynamically varying a clock signal

System to temporarily modify an output waveform

Receiver and method for mitigating temporary logic transitions

System and method for measuring current

Register renaming to reduce bypass and increase apparent physical r...

System and method for dynamically varying a clock signal

Multidispatch CPU integrated circuit having virtualized and modular...

Method and circuit for measuring on-chip, cycle-to-cycle clock jitter

Mechanism for data forwarding

Method and apparatus for reducing average power in RAMs by dynamica...

Adapting VLSI clocking to short term voltage transients

Method and apparatus for reducing average power in memory arrays by...

Large input function replaying dynamic entry latch with static and...

Storage cell on integrated circuit responsive to plural frequency c...

Patents Applicationslast 30 patents

Control Apparatus, Device, Method and Computer Program for Determin...

MANAGING POWER CONSUMPTION IN A MULTI-CORE PROCESSOR

Managing Power Consumption In A Multi-Core Processor

Receiver and method for mitigating temporary logic transitions

System and method for dynamically varying a clock signal

System and method for dynamically varying a clock signal

Power estimation based on power characterizations of non-convention...

System toTemporarily Modify an Output Waveform

System and method for measuring current

METHOD AND CIRCUIT FOR MEASURING ON-CHIP, CYCLE-TO-CYCLE CLOCK JITTER

System and method for evaluating the speed of a circuit

Method and circuit for reducing silent data corruption in storage a...

Mechanism for data forwarding

Multidispatch cpu integrated circuit having virtualized and modular...

Register renaming to reduce bypass and increase apparent physical r...

Dynamically adjustable cache size based on application behavior to...

Simplified cache hierarchy by using multiple tags and entries into...

ADAPTING VLSI CLOCKING TO SHORT TERM VOLTAGE TRANSIENTS

Method and apparatus for reducing average power and increasing cach...

Method and apparatus for reducing average power in RAMs by dynamica...