Eric Naviasky

Person

Ellicot City, MD, US

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit for a voltage comparator
- Patent number 11,955,978
- Issue date Apr 9, 2024
- Blue Cheetah Analog Design, Inc.
- Elad Alon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encoding and striping technique for DC balancing in single-ended si...
- Patent number 10,992,449
- Issue date Apr 27, 2021
- Cadence Design Systems, Inc.
- Loren B. Reiss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple injection lock ring-based phase interpolator
- Patent number 10,498,345
- Issue date Dec 3, 2019
- Cadence Design Systems, Inc.
- Sambarta Rakshit
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual path phase-locked loop circuit
- Patent number 10,389,368
- Issue date Aug 20, 2019
- Cadence Design Systems, Inc.
- Fuyue Wang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fast settling bias circuit
- Patent number 10,345,845
- Issue date Jul 9, 2019
- Cadence Design Systems, Inc.
- Ling Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low-frequency periodic signal detector
- Patent number 10,225,115
- Issue date Mar 5, 2019
- Cadence Design Systems, Inc.
- Mathieu Gagnon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and devices for a memory interface receiver
- Patent number 10,193,555
- Issue date Jan 29, 2019
- Cadence Design Systems, Inc.
- Eric Harris Naviasky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Frequency to current circuit
- Patent number 10,161,974
- Issue date Dec 25, 2018
- Cadence Design Systems, Inc.
- Ling Chen
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and devices for a DDR memory driver using a voltage transla...
- Patent number 9,589,627
- Issue date Mar 7, 2017
- Cadence Design Systems, Inc.
- Thomas Evan Wilson
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for selectively coupled parasitic compensation fo...
- Patent number 9,490,795
- Issue date Nov 8, 2016
- Cadence Design Systems, Inc.
- Eric Naviasky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Differential signal detector and full wave rectifier circuit thereo...
- Patent number 9,450,511
- Issue date Sep 20, 2016
- Cadence Design Systems, Inc.
- Santiago L. Bortman
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
System and method for synchronously adjusted delay and distortion m...
- Patent number 9,405,314
- Issue date Aug 2, 2016
- Cadence Design Systems, Inc.
- Eric Naviasky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid analog/digital clock recovery system
- Patent number 9,356,767
- Issue date May 31, 2016
- Cadence Design Systems, Inc.
- Ali Ulas Ilhan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Time to digital converter with successive approximation architecture
- Patent number 9,285,778
- Issue date Mar 15, 2016
- Cadence Design Systems, Inc.
- William P. Evans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for boosting a selective portion of a drive signa...
- Patent number 9,148,130
- Issue date Sep 29, 2015
- Cadence Design Systems, Inc.
- Eric Naviasky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for augmenting frequency tuning resolution in L-C...
- Patent number 9,071,193
- Issue date Jun 30, 2015
- Cadence Design Systems, Inc.
- Anthony Caviglia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Analog-to-digital converter based decision feedback equalization
- Patent number 8,737,490
- Issue date May 27, 2014
- Cadence Design Systems, Inc.
- Thomas Evan Wilson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Analog-to-digital converter based decision feedback equalization
- Patent number 8,737,491
- Issue date May 27, 2014
- Cadence Design Systems, Inc.
- Thomas Evan Wilson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for combined I/Q generation and selective phase i...
- Patent number 8,710,929
- Issue date Apr 29, 2014
- Cadence Design Systems, Inc.
- Eric Naviasky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods of clock signal generation with selected phase delay
- Patent number 8,502,586
- Issue date Aug 6, 2013
- Cadence Design Systems, Inc.
- Eric Naviasky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Frequency adjustment in a control system
- Patent number 8,384,453
- Issue date Feb 26, 2013
- Cadence Design Systems, Inc.
- Anthony Louis Caviglia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase interpolator circuit with two phase capacitor charging
- Patent number 8,063,686
- Issue date Nov 22, 2011
- Cadence Design Systems, Inc.
- Eric Naviasky
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dual loop clock recovery circuit
- Patent number 8,036,300
- Issue date Oct 11, 2011
- Rambus, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Voltage interpolation in digital-to-analog signal conversion
- Patent number 7,773,013
- Issue date Aug 10, 2010
- Cadence Design Systems, Inc.
- Stephen Williams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wideband phase-locked loop with adaptive frequency response that tr...
- Patent number 7,634,038
- Issue date Dec 15, 2009
- Cadence Design Systems, Inc.
- Michael Hufford
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Frequency-to-current converter
- Patent number 7,627,072
- Issue date Dec 1, 2009
- Cadence Design Systems, Inc.
- Eric Naviasky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual loop clock recovery circuit
- Patent number 7,587,012
- Issue date Sep 8, 2009
- Rambus, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase locked loop with adaptive phase error compensation
- Patent number 7,579,886
- Issue date Aug 25, 2009
- Cadence Design Systems, Inc.
- Michael M. Hufford
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage interpolation in digital-to-analog signal conversion
- Patent number 7,417,572
- Issue date Aug 26, 2008
- Cadence Design Systems
- Stephen Williams
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Auto-zero circuit
- Patent number 7,348,824
- Issue date Mar 25, 2008
- Cadence Design Systems, Inc.
- Eric Naviasky
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Measurement and Control of Clock Signal Phases
- Publication number 20240088905
- Publication date Mar 14, 2024
- Blue Cheetah Analog Design, Inc.
- Paul Everhardt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dual loop clock recovery circuit
- Publication number 20090257542
- Publication date Oct 15, 2009
- Rambus, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE LOCKED LOOP WITH ADAPTIVE PHASE ERROR COMPENSATION
- Publication number 20080136532
- Publication date Jun 12, 2008
- Cadence Design Systems, Inc.
- Michael M. HUFFORD
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Frequency-to-current converter
- Publication number 20070172013
- Publication date Jul 26, 2007
- Cadence Design Systems, Inc.
- Eric Naviasky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Auto-zero circuit
- Publication number 20060197574
- Publication date Sep 7, 2006
- Cadence Design Systems, Inc.
- Eric Naviasky
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dual loop clock recovery circuit
- Publication number 20060034395
- Publication date Feb 16, 2006
- Rambus, Inc.
- William P. Evans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Voltage controlled oscillator amplitude control circuit
- Publication number 20050104670
- Publication date May 19, 2005
- Eric H. Naviasky
- H03 - BASIC ELECTRONIC CIRCUITRY

Eric Naviasky

Person

Patents Grantslast 30 patents

Circuit for a voltage comparator

Encoding and striping technique for DC balancing in single-ended si...

Multiple injection lock ring-based phase interpolator

Dual path phase-locked loop circuit

Fast settling bias circuit

Low-frequency periodic signal detector

Methods and devices for a memory interface receiver

Frequency to current circuit

Methods and devices for a DDR memory driver using a voltage transla...

System and method for selectively coupled parasitic compensation fo...

Differential signal detector and full wave rectifier circuit thereo...

System and method for synchronously adjusted delay and distortion m...

Hybrid analog/digital clock recovery system

Time to digital converter with successive approximation architecture

System and method for boosting a selective portion of a drive signa...

System and method for augmenting frequency tuning resolution in L-C...

Analog-to-digital converter based decision feedback equalization

Analog-to-digital converter based decision feedback equalization

System and method for combined I/Q generation and selective phase i...

Methods of clock signal generation with selected phase delay

Frequency adjustment in a control system

Phase interpolator circuit with two phase capacitor charging

Dual loop clock recovery circuit

Voltage interpolation in digital-to-analog signal conversion

Wideband phase-locked loop with adaptive frequency response that tr...

Frequency-to-current converter

Dual loop clock recovery circuit

Phase locked loop with adaptive phase error compensation

Voltage interpolation in digital-to-analog signal conversion

Auto-zero circuit

Patents Applicationslast 30 patents

Measurement and Control of Clock Signal Phases

Dual loop clock recovery circuit

PHASE LOCKED LOOP WITH ADAPTIVE PHASE ERROR COMPENSATION

Frequency-to-current converter

Auto-zero circuit

Dual loop clock recovery circuit

Voltage controlled oscillator amplitude control circuit