Erik P. Machnicki

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System on a chip with always-on component with powered-down configu...
- Patent number 12,117,320
- Issue date Oct 15, 2024
- Apple Inc.
- Brijesh Tripathi
- B60 - VEHICLES IN GENERAL
Information Patent Grant
System on a chip with always-on processor
- Patent number 11,079,261
- Issue date Aug 3, 2021
- Apple Inc.
- Brijesh Tripathi
- G01 - MEASURING TESTING
Information Patent Grant
System for managing memory devices
- Patent number 10,877,688
- Issue date Dec 29, 2020
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on a chip with always-on processor
- Patent number 10,488,230
- Issue date Nov 26, 2019
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on a chip with always-on processor which reconfigures SOC an...
- Patent number 10,261,894
- Issue date Apr 16, 2019
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for coalescing interrupts
- Patent number 10,055,369
- Issue date Aug 21, 2018
- Apple Inc.
- Charles E. Tucker
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Timebase synchronization
- Patent number 10,048,720
- Issue date Aug 14, 2018
- Apple Inc.
- Shu-Yi Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on a chip with always-on processor
- Patent number 10,031,000
- Issue date Jul 24, 2018
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure bypass of low-level configuration in reconfiguration of a co...
- Patent number 9,959,124
- Issue date May 1, 2018
- Apple Inc.
- Gilbert H. Herbeck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timebase synchronization
- Patent number 9,864,399
- Issue date Jan 9, 2018
- Apple Inc.
- Shu-Yi Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management of cache duplicate tags
- Patent number 9,823,730
- Issue date Nov 21, 2017
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low energy processor for controlling operating states of a computer...
- Patent number 9,811,142
- Issue date Nov 7, 2017
- Apple Inc.
- Cyril de la Cropte de Chanterac
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configuration fuse data management in a partial power-on state
- Patent number 9,659,616
- Issue date May 23, 2017
- Apple Inc.
- Manu Gulati
- G11 - INFORMATION STORAGE
Information Patent Grant
Under voltage detection and performance throttling
- Patent number 9,658,634
- Issue date May 23, 2017
- Apple Inc.
- Brijesh Tripathi
- G05 - CONTROLLING REGULATING
Information Patent Grant
Selectively permitting an apparatus to be awakened depending on a p...
- Patent number 9,645,630
- Issue date May 9, 2017
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interfacing dynamic hardware power managed blocks and software powe...
- Patent number 9,639,143
- Issue date May 2, 2017
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System on a chip with always-on processor which reconfigures SOC an...
- Patent number 9,619,377
- Issue date Apr 11, 2017
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Subsystem idle aggregation
- Patent number 9,529,405
- Issue date Dec 27, 2016
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coherence processing with pre-kill mechanism to avoid duplicated tr...
- Patent number 9,465,740
- Issue date Oct 11, 2016
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Thermal voltage margin recovery
- Patent number 9,413,353
- Issue date Aug 9, 2016
- Apple Inc.
- Erik P Machnicki
- G05 - CONTROLLING REGULATING
Information Patent Grant
Method for asynchronous gating of signals between clock domains
- Patent number 9,354,658
- Issue date May 31, 2016
- Apple Inc.
- Erik P. Machnicki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power control for cache structures
- Patent number 9,317,102
- Issue date Apr 19, 2016
- Apple Inc.
- Muditha Kanchana
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic clock and power gating with decentralized wake-ups
- Patent number 9,310,783
- Issue date Apr 12, 2016
- Apple Inc.
- Erik P Machnicki
- G05 - CONTROLLING REGULATING
Information Patent Grant
Interrupt distribution scheme
- Patent number 9,262,353
- Issue date Feb 16, 2016
- Apple Inc.
- Josh P. de Cesare
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Interrupt timestamping
- Patent number 9,201,821
- Issue date Dec 1, 2015
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interfacing dynamic hardware power managed blocks and software powe...
- Patent number 9,182,811
- Issue date Nov 10, 2015
- Apple Inc.
- Erik P Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Race-free level-sensitive interrupt delivery using fabric delivered...
- Patent number 9,152,588
- Issue date Oct 6, 2015
- Apple Inc.
- Manu Gulati
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus for determining tunable parameters to use in p...
- Patent number 9,152,210
- Issue date Oct 6, 2015
- Apple Inc.
- Erik P Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power on reset detector
- Patent number 9,081,556
- Issue date Jul 14, 2015
- Apple Inc.
- Timothy R. Paaske
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hardware-based automatic clock gating
- Patent number 9,081,517
- Issue date Jul 14, 2015
- Apple Inc.
- Kleanthes Koniaris
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Patents Applicationslast 30 patents

Information Patent Application
System on a Chip with Always-On Processor
- Publication number 20210341317
- Publication date Nov 4, 2021
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a Chip with Always-On Processor
- Publication number 20210333132
- Publication date Oct 28, 2021
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a Chip with Always-On Processor
- Publication number 20200149932
- Publication date May 14, 2020
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a Chip with Always-On Processor
- Publication number 20180313673
- Publication date Nov 1, 2018
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Timebase Synchronization
- Publication number 20180107240
- Publication date Apr 19, 2018
- Apple Inc.
- Shu-Yi Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM FOR MANAGING MEMORY DEVICES
- Publication number 20180032281
- Publication date Feb 1, 2018
- Apple Inc.
- Manu Gulati
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a Chip with Always-On Processor Which Reconfigures SOC an...
- Publication number 20170177256
- Publication date Jun 22, 2017
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Timebase Synchronization
- Publication number 20170168520
- Publication date Jun 15, 2017
- Apple Inc.
- Shu-Yi Yu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power Management of Cache Duplicate Tags
- Publication number 20170010655
- Publication date Jan 12, 2017
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Under Voltage Detection and Performance Throttling
- Publication number 20160291625
- Publication date Oct 6, 2016
- Apple Inc.
- Brijesh Tripathi
- G05 - CONTROLLING REGULATING
Information Patent Application
LOW ENERGY PROCESSOR FOR CONTROLLING OPERATING STATES OF A COMPUTER...
- Publication number 20160091954
- Publication date Mar 31, 2016
- Apple Inc.
- Cyril de la Cropte de Chanterac
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Subsystem Idle Aggregation
- Publication number 20160048191
- Publication date Feb 18, 2016
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONFIGURATION FUSE DATA MANAGEMENT IN A PARTIAL POWER-ON STATE
- Publication number 20160049207
- Publication date Feb 18, 2016
- Apple Inc.
- Manu Gulati
- G11 - INFORMATION STORAGE
Information Patent Application
Interfacing Dynamic Hardware Power Managed Blocks and Software Powe...
- Publication number 20160026234
- Publication date Jan 28, 2016
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a Chip with Always-On Processor Which Reconfigures SOC an...
- Publication number 20150347287
- Publication date Dec 3, 2015
- Apple Inc.
- Brijesh Tripathi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System on a Chip with Always-On Processor
- Publication number 20150346001
- Publication date Dec 3, 2015
- Apple Inc.
- Brijesh Tripathi
- G01 - MEASURING TESTING
Information Patent Application
Thermal Voltage Margin Recovery
- Publication number 20150326216
- Publication date Nov 12, 2015
- Apple Inc.
- Erik P. Machnicki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR ASYNCHRONOUS GATING OF SIGNALS BETWEEN CLOCK DOMAINS
- Publication number 20150323960
- Publication date Nov 12, 2015
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interrupt Distribution Scheme
- Publication number 20150113193
- Publication date Apr 23, 2015
- Apple Inc.
- Josh P. de Cesare
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock Generation Using Fixed Dividers and Multiplex Circuits
- Publication number 20140340130
- Publication date Nov 20, 2014
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COHERENCE PROCESSING WITH PRE-KILL MECHANISM TO AVOID DUPLICATED TR...
- Publication number 20140310469
- Publication date Oct 16, 2014
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Determining Tunable Parameters to Use in P...
- Publication number 20140237276
- Publication date Aug 21, 2014
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGED SYNCHRONIZERS FOR ASYNCHRONOUS INPUT SIGNALS
- Publication number 20140203850
- Publication date Jul 24, 2014
- Apple Inc.
- Gilbert Herbeck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Numerically-Controlled Oscillator
- Publication number 20140203884
- Publication date Jul 24, 2014
- Apple Inc.
- Kleanthes G. Koniaris
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
POWER-UP RESTRICTION
- Publication number 20140208135
- Publication date Jul 24, 2014
- Apple Inc.
- Shane J. Keil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TIER WATCHDOG TIMER
- Publication number 20140201578
- Publication date Jul 17, 2014
- Apple Inc.
- Alexei E. Kosut
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RESET EXTENDER FOR DIVIDED CLOCK DOMAINS
- Publication number 20140197870
- Publication date Jul 17, 2014
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-TIER SWITCH INTERFACE UNIT ARBITER
- Publication number 20140192801
- Publication date Jul 10, 2014
- Apple Inc.
- Erik P. Machnicki
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
POWER CONTROL FOR CACHE STRUCTURES
- Publication number 20140189411
- Publication date Jul 3, 2014
- Apple Inc.
- Muditha Kanchana
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interfacing Dynamic Hardware Power Managed Blocks and Software Powe...
- Publication number 20140173307
- Publication date Jun 19, 2014
- Apple Inc.
- Erik P. Machnicki
- G06 - COMPUTING CALCULATING COUNTING

Erik P. Machnicki

Person

Patents Grantslast 30 patents

System on a chip with always-on component with powered-down configu...

System on a chip with always-on processor

System for managing memory devices

System on a chip with always-on processor

System on a chip with always-on processor which reconfigures SOC an...

Systems and methods for coalescing interrupts

Timebase synchronization

System on a chip with always-on processor

Secure bypass of low-level configuration in reconfiguration of a co...

Timebase synchronization

Power management of cache duplicate tags

Low energy processor for controlling operating states of a computer...

Configuration fuse data management in a partial power-on state

Under voltage detection and performance throttling

Selectively permitting an apparatus to be awakened depending on a p...

Interfacing dynamic hardware power managed blocks and software powe...

System on a chip with always-on processor which reconfigures SOC an...

Subsystem idle aggregation

Coherence processing with pre-kill mechanism to avoid duplicated tr...

Thermal voltage margin recovery

Method for asynchronous gating of signals between clock domains

Power control for cache structures

Dynamic clock and power gating with decentralized wake-ups

Interrupt distribution scheme

Interrupt timestamping

Interfacing dynamic hardware power managed blocks and software powe...

Race-free level-sensitive interrupt delivery using fabric delivered...

Method and apparatus for determining tunable parameters to use in p...

Power on reset detector

Hardware-based automatic clock gating

Patents Applicationslast 30 patents

System on a Chip with Always-On Processor

System on a Chip with Always-On Processor

System on a Chip with Always-On Processor

System on a Chip with Always-On Processor

Timebase Synchronization

SYSTEM FOR MANAGING MEMORY DEVICES

System on a Chip with Always-On Processor Which Reconfigures SOC an...

Timebase Synchronization

Power Management of Cache Duplicate Tags

Under Voltage Detection and Performance Throttling

LOW ENERGY PROCESSOR FOR CONTROLLING OPERATING STATES OF A COMPUTER...

Subsystem Idle Aggregation

CONFIGURATION FUSE DATA MANAGEMENT IN A PARTIAL POWER-ON STATE

Interfacing Dynamic Hardware Power Managed Blocks and Software Powe...

System on a Chip with Always-On Processor Which Reconfigures SOC an...

System on a Chip with Always-On Processor

Thermal Voltage Margin Recovery

METHOD FOR ASYNCHRONOUS GATING OF SIGNALS BETWEEN CLOCK DOMAINS

Interrupt Distribution Scheme

Clock Generation Using Fixed Dividers and Multiplex Circuits

COHERENCE PROCESSING WITH PRE-KILL MECHANISM TO AVOID DUPLICATED TR...

Method and Apparatus for Determining Tunable Parameters to Use in P...

POWER MANAGED SYNCHRONIZERS FOR ASYNCHRONOUS INPUT SIGNALS

Numerically-Controlled Oscillator

POWER-UP RESTRICTION

MULTI-TIER WATCHDOG TIMER

RESET EXTENDER FOR DIVIDED CLOCK DOMAINS

MULTI-TIER SWITCH INTERFACE UNIT ARBITER

POWER CONTROL FOR CACHE STRUCTURES

Interfacing Dynamic Hardware Power Managed Blocks and Software Powe...