Erin C. Jones

Person

Tuchahoe, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Self-aligned planar double-gate transistor structure
- Patent number 7,960,790
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polycrystalline SiGe Junctions for advanced devices
- Patent number 7,741,165
- Issue date Jun 22, 2010
- International Business Machines Corporation
- Kevin Kok Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low temperature fusion bonding with high surface energy using a wet...
- Patent number 7,713,837
- Issue date May 11, 2010
- International Business Machines Corporation
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low temperature fusion bonding with high surface energy using a wet...
- Patent number 7,566,631
- Issue date Jul 28, 2009
- International Business Machines Corporation
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned planar double-gate transistor structure
- Patent number 7,453,123
- Issue date Nov 18, 2008
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polycrystalline SiGe junctions for advanced devices
- Patent number 7,387,924
- Issue date Jun 17, 2008
- International Business Machines Corporation
- Kevin Kok Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductor side wall fin
- Patent number 7,361,556
- Issue date Apr 22, 2008
- International Business Machines Corporation
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductor side wall fin
- Patent number 7,265,417
- Issue date Sep 4, 2007
- International Business Machines Corporation
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned planar double-gate process by self-aligned oxidation
- Patent number 7,205,185
- Issue date Apr 17, 2007
- International Busniess Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI wafers with 30-100 Å buried oxide (BOX) created by wafer bondin...
- Patent number 7,166,521
- Issue date Jan 23, 2007
- International Business Machines Corporation
- Diane C. Boyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductor side wall fin
- Patent number 7,163,864
- Issue date Jan 16, 2007
- International Business Machines Corporation
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Polycrystalline SiGe junctions for advanced devices
- Patent number 7,135,391
- Issue date Nov 14, 2006
- International Business Machines Corporation
- Kevin Kok Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Double gate trench transistor
- Patent number 7,112,845
- Issue date Sep 26, 2006
- International Business Machines Corporation
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
SOI wafers with 30-100 Å buried oxide (BOX) created by wafe...
- Patent number 6,835,633
- Issue date Dec 28, 2004
- International Business Machines Corporation
- Diane C. Boyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned planar double-gate process by amorphization
- Patent number 6,833,569
- Issue date Dec 21, 2004
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making multiple threshold voltage FET using multiple wor...
- Patent number 6,797,553
- Issue date Sep 28, 2004
- International Business Machines Corporation
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Damascene double-gate FET
- Patent number 6,762,101
- Issue date Jul 13, 2004
- International Business Machines Corporation
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Damascene double-gate MOSFET structure and its fabrication method
- Patent number 6,686,630
- Issue date Feb 3, 2004
- International Business Machines Corporation
- Hussein Ibrahim Hanafi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Damascene double-gate FET
- Patent number 6,580,132
- Issue date Jun 17, 2003
- International Business Machines Corporation
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure having refractory metal film on a substrate
- Patent number 6,579,614
- Issue date Jun 17, 2003
- International Business Machines Corporation
- Kevin K. Chan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Double gate trench transistor
- Patent number 6,472,258
- Issue date Oct 29, 2002
- International Business Machines Corporation
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multiple threshold voltage FET using multiple work-function gate ma...
- Patent number 6,448,590
- Issue date Sep 10, 2002
- International Business Machines Corporation
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical trench-formed dual-gate FET device structure and method fo...
- Patent number 6,406,962
- Issue date Jun 18, 2002
- International Business Machines Corporation
- Paul D. Agnello
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method utilizing CMP to fabricate double gate MOSFETS with conducti...
- Patent number 6,339,002
- Issue date Jan 15, 2002
- International Business Machines Corporation
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two-step MOSFET gate formation for high-density devices
- Patent number 6,333,247
- Issue date Dec 25, 2001
- International Business Machines Corporation
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back-plane for semiconductor device
- Patent number 6,281,551
- Issue date Aug 28, 2001
- International Business Machines Corporation
- Kevin Kok Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for protecting refractory metal thin film requiring high tem...
- Patent number 6,238,737
- Issue date May 29, 2001
- International Business Machines Corporation
- Kevin K. Chan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Method for making bonded metal back-plane substrates
- Patent number 6,057,212
- Issue date May 2, 2000
- International Business Machines Corporation
- Kevin Kok Chan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SELF-ALIGNED PLANAR DOUBLE-GATE TRANSISTOR STRUCTURE
- Publication number 20080246090
- Publication date Oct 9, 2008
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Polycrystalline SiGe Junctions for Advanced Devices
- Publication number 20080248635
- Publication date Oct 9, 2008
- International Business Machines Corporation
- Kevin Kok Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOW TEMPERATURE FUSION BONDING WITH HIGH SURFACE ENERGY USING A WET...
- Publication number 20080227270
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED PLANAR DOUBLE-GATE PROCESS BY SELF-ALIGNED OXIDATION
- Publication number 20070138556
- Publication date Jun 21, 2007
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating semiconductor side wall fin
- Publication number 20070026617
- Publication date Feb 1, 2007
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Polycrystalline SiGe junctions for advanced devices
- Publication number 20070010076
- Publication date Jan 11, 2007
- International Business Machines Corporation
- Kevin Kok Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low temperature fusion bonding with high surface energy using a wet...
- Publication number 20060194414
- Publication date Aug 31, 2006
- International Business Machines Corporation
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Polycrystalline SiGe junctions for advanced devices
- Publication number 20050260832
- Publication date Nov 24, 2005
- Kevin Kok Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-aligned planar double-gate process by self-aligned oxidation
- Publication number 20050059252
- Publication date Mar 17, 2005
- International Business Machines Corporation
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI wafers with 30-100 A buried oxide (BOX) created by wafer bondin...
- Publication number 20050042841
- Publication date Feb 24, 2005
- International Business Machines Corporation
- Diane C. Boyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating semiconductor side wall fin
- Publication number 20050001216
- Publication date Jan 6, 2005
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low temperature fusion bonding with high surface energy using a wet...
- Publication number 20040126993
- Publication date Jul 1, 2004
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-aligned planar double-gate process by amorphization
- Publication number 20040121549
- Publication date Jun 24, 2004
- Omer H. Dokumaci
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SOI wafers with 30-100 A buried oxide (box) created by wafer bondin...
- Publication number 20040018699
- Publication date Jan 29, 2004
- International Business Machines Corporation
- Diane C. Boyd
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Damascene double-gate FET
- Publication number 20030193070
- Publication date Oct 16, 2003
- International Business Machines Corporation
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming variable oxide thicknesses across semiconductor c...
- Publication number 20020197836
- Publication date Dec 26, 2002
- International Business Machines Corporation
- S. Sundar Kumar Iyer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for making multiple threshold voltage fet using multiple wor...
- Publication number 20020177279
- Publication date Nov 28, 2002
- International Business Machines Corporation
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Double gate trench transistor
- Publication number 20020140039
- Publication date Oct 3, 2002
- International Business Machines Corporation
- James W. Adkisson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Damascene double-gate mosfet structure and its fabrication method
- Publication number 20020105039
- Publication date Aug 8, 2002
- International Business Machines Corporation Armonk, New York
- Hussein Ibrahim Hanafi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Two-step MOSFET gate formation for high-density devices
- Publication number 20020042183
- Publication date Apr 11, 2002
- Kevin K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for protecting refractory metal thin film requiring high tem...
- Publication number 20010019737
- Publication date Sep 6, 2001
- Kevin K. Chan
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...

Erin C. Jones

Person

Patents Grantslast 30 patents

Self-aligned planar double-gate transistor structure

Polycrystalline SiGe Junctions for advanced devices

Low temperature fusion bonding with high surface energy using a wet...

Low temperature fusion bonding with high surface energy using a wet...

Self-aligned planar double-gate transistor structure

Polycrystalline SiGe junctions for advanced devices

Method of fabricating semiconductor side wall fin

Method of fabricating semiconductor side wall fin

Self-aligned planar double-gate process by self-aligned oxidation

SOI wafers with 30-100 Å buried oxide (BOX) created by wafer bondin...

Method of fabricating semiconductor side wall fin

Polycrystalline SiGe junctions for advanced devices

Double gate trench transistor

SOI wafers with 30-100 &#x0212B; buried oxide (BOX) created by wafe...

Self-aligned planar double-gate process by amorphization

Method for making multiple threshold voltage FET using multiple wor...

Damascene double-gate FET

Damascene double-gate MOSFET structure and its fabrication method

Damascene double-gate FET

Structure having refractory metal film on a substrate

Double gate trench transistor

Multiple threshold voltage FET using multiple work-function gate ma...

Vertical trench-formed dual-gate FET device structure and method fo...

Method utilizing CMP to fabricate double gate MOSFETS with conducti...

Two-step MOSFET gate formation for high-density devices

Back-plane for semiconductor device

Method for protecting refractory metal thin film requiring high tem...

Method for making bonded metal back-plane substrates

Patents Applicationslast 30 patents

SELF-ALIGNED PLANAR DOUBLE-GATE TRANSISTOR STRUCTURE

Polycrystalline SiGe Junctions for Advanced Devices

LOW TEMPERATURE FUSION BONDING WITH HIGH SURFACE ENERGY USING A WET...

SELF-ALIGNED PLANAR DOUBLE-GATE PROCESS BY SELF-ALIGNED OXIDATION

Method of fabricating semiconductor side wall fin

Polycrystalline SiGe junctions for advanced devices

Low temperature fusion bonding with high surface energy using a wet...

Polycrystalline SiGe junctions for advanced devices

Self-aligned planar double-gate process by self-aligned oxidation

SOI wafers with 30-100 A buried oxide (BOX) created by wafer bondin...

Method of fabricating semiconductor side wall fin

Low temperature fusion bonding with high surface energy using a wet...

Self-aligned planar double-gate process by amorphization

SOI wafers with 30-100 A buried oxide (box) created by wafer bondin...

Damascene double-gate FET

Method of forming variable oxide thicknesses across semiconductor c...

Method for making multiple threshold voltage fet using multiple wor...

Double gate trench transistor

Damascene double-gate mosfet structure and its fabrication method

Two-step MOSFET gate formation for high-density devices

Method for protecting refractory metal thin film requiring high tem...

SOI wafers with 30-100 Å buried oxide (BOX) created by wafe...