Ernesto Gutierrez III

Person

Swindon, GB

People

Patents Grantslast 30 patents

Information Patent Grant
Embedded resistor-capacitor film for fan out wafer level packaging
- Patent number 12,100,674
- Issue date Sep 24, 2024
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pillared cavity down MIS-SiP
- Patent number 11,532,489
- Issue date Dec 20, 2022
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Very thin embedded trace substrate-system in package (SIP)
- Patent number 11,309,255
- Issue date Apr 19, 2022
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedded resistor-capacitor film for fan out wafer level packaging
- Patent number 11,239,185
- Issue date Feb 1, 2022
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level chip scale package structure
- Patent number 11,114,359
- Issue date Sep 7, 2021
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pillared cavity down MIS-SIP
- Patent number 11,075,167
- Issue date Jul 27, 2021
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package and a method for forming a wafer level c...
- Patent number 10,727,174
- Issue date Jul 28, 2020
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Very thin embedded trace substrate-system in package (SIP)
- Patent number 10,636,742
- Issue date Apr 28, 2020
- Dialog Semiconductor (US) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System in package (SIP)
- Patent number 10,629,507
- Issue date Apr 21, 2020
- Dialog Semiconductor (UK) Limited
- Che-Han Jerry Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress relief solutions on WLCSP large/bulk copper plane design
- Patent number 10,083,926
- Issue date Sep 25, 2018
- Dialog Semiconductor (UK) Limited
- Ian Kent
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Embedded Resistor-Capacitor Film for Fan Out Wafer Level Packaging
- Publication number 20220139850
- Publication date May 5, 2022
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pillared Cavity Down MIS-SIP
- Publication number 20210305167
- Publication date Sep 30, 2021
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pillared Cavity Down MIS-SIP
- Publication number 20200251350
- Publication date Aug 6, 2020
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Very Thin Embedded Trace Substrate-System in Package (SIP)
- Publication number 20200227356
- Publication date Jul 16, 2020
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer Level Chip Scale Package Structure
- Publication number 20200091026
- Publication date Mar 19, 2020
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Package and a method for Forming a Wafer Level C...
- Publication number 20200091051
- Publication date Mar 19, 2020
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Embedded Resistor-Capacitor Film for Fan Out Wafer Level Packaging
- Publication number 20190139911
- Publication date May 9, 2019
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Very Thin Embedded Trace Substrate-System in Package (SIP)
- Publication number 20190096815
- Publication date Mar 28, 2019
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS

Ernesto Gutierrez III

Person

Patents Grantslast 30 patents

Embedded resistor-capacitor film for fan out wafer level packaging

Pillared cavity down MIS-SiP

Very thin embedded trace substrate-system in package (SIP)

Embedded resistor-capacitor film for fan out wafer level packaging

Wafer level chip scale package structure

Pillared cavity down MIS-SIP

Integrated circuit package and a method for forming a wafer level c...

Very thin embedded trace substrate-system in package (SIP)

System in package (SIP)

Stress relief solutions on WLCSP large/bulk copper plane design

Patents Applicationslast 30 patents

Embedded Resistor-Capacitor Film for Fan Out Wafer Level Packaging

Pillared Cavity Down MIS-SIP

Pillared Cavity Down MIS-SIP

Very Thin Embedded Trace Substrate-System in Package (SIP)

Wafer Level Chip Scale Package Structure

Integrated Circuit Package and a method for Forming a Wafer Level C...

Embedded Resistor-Capacitor Film for Fan Out Wafer Level Packaging

Very Thin Embedded Trace Substrate-System in Package (SIP)