Eugene A. Rodi

Person

Minneapolis, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Familial correction with non-familial double bit error detection
- Patent number 7,634,709
- Issue date Dec 15, 2009
- Unisys Corporation
- Mitchell A. Bauman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller having programmable initialization sequence
- Patent number 7,506,110
- Issue date Mar 17, 2009
- Unisys Corporation
- Justin S. Neils
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for increasing bandwidth in a directory based hig...
- Patent number 7,219,199
- Issue date May 15, 2007
- Unisys Corporation
- Eugene A. Rodi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for testing and initializing directory store memory
- Patent number 7,167,955
- Issue date Jan 23, 2007
- Unisys Corporation
- Justin S. Neils
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller having programmable initialization sequence
- Patent number 7,155,579
- Issue date Dec 26, 2006
- Unisys Corporation
- Justin S. Neils
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient timing chart creation and manipulation
- Patent number 7,093,240
- Issue date Aug 15, 2006
- Unisys Corporation
- Eugene A. Rodi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Familial correction with non-familial double bit error detection fo...
- Patent number 6,973,612
- Issue date Dec 6, 2005
- Unisys Corporation
- Eugene A. Rodi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Directory-based cache coherency system supporting multiple instruct...
- Patent number 6,587,931
- Issue date Jul 1, 2003
- Unisys Corporation
- Mitchell A. Bauman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Directory based cache coherency system supporting multiple instruct...
- Patent number 6,438,659
- Issue date Aug 20, 2002
- Unisys Corporation
- Mitchell A. Bauman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-speed memory storage unit for a multiprocessor system having i...
- Patent number 6,415,364
- Issue date Jul 2, 2002
- Unisys Corporation
- Mitchell A. Bauman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for performing parallel initialization and testin...
- Patent number 6,381,715
- Issue date Apr 30, 2002
- Unisys Corporation
- Mitchell A. Bauman
- G11 - INFORMATION STORAGE
Information Patent Grant
Data processing system and method for substituting one type of requ...
- Patent number 6,263,409
- Issue date Jul 17, 2001
- Unisys Corporation
- Michael L. Haupt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault tolerant apparatus and method for maintaining one or more que...
- Patent number 5,649,092
- Issue date Jul 15, 1997
- Unisys Corporation
- Ferris T. Price
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resilient storage system
- Patent number 5,463,644
- Issue date Oct 31, 1995
- Unisys Corporation
- EuGene A. Rodi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Memory controller having programmable initialization sequence
- Publication number 20070067599
- Publication date Mar 22, 2007
- UNISYS CORPORATION
- Justin S. Neils
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Familial correction with non-familial double bit error detection
- Publication number 20030070133
- Publication date Apr 10, 2003
- Mitchell A. Bauman
- G06 - COMPUTING CALCULATING COUNTING

Eugene A. Rodi

Person

Patents Grantslast 30 patents

Familial correction with non-familial double bit error detection

Memory controller having programmable initialization sequence

System and method for increasing bandwidth in a directory based hig...

System and method for testing and initializing directory store memory

Memory controller having programmable initialization sequence

Efficient timing chart creation and manipulation

Familial correction with non-familial double bit error detection fo...

Directory-based cache coherency system supporting multiple instruct...

Directory based cache coherency system supporting multiple instruct...

High-speed memory storage unit for a multiprocessor system having i...

System and method for performing parallel initialization and testin...

Data processing system and method for substituting one type of requ...

Fault tolerant apparatus and method for maintaining one or more que...

Resilient storage system

Patents Applicationslast 30 patents

Memory controller having programmable initialization sequence

Familial correction with non-familial double bit error detection