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Eunice Y. D. Hao
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Saratoga, CA, US
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Patents Grants
last 30 patents
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Patent Grant
Method and apparatus for configuring the operating speed of a progr...
Patent number
7,417,918
Issue date
Aug 26, 2008
Xilinx, Inc.
Eunice Y. D. Hao
G11 - INFORMATION STORAGE
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Patent Grant
First-in, first-out memory system with reduced cycle latency
Patent number
7,254,677
Issue date
Aug 7, 2007
Xilinx, Inc.
Wayson J. Lowe
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
First-in, first-out buffer system in an integrated circuit
Patent number
7,161,849
Issue date
Jan 9, 2007
Xilinx, Inc.
Wayson J. Lowe
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Almost full, almost empty memory system
Patent number
6,956,776
Issue date
Oct 18, 2005
Xilinx, Inc.
Wayson J. Lowe
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and system for gray-coding counting
Patent number
6,937,172
Issue date
Aug 30, 2005
Xilinx, Inc.
Wayson J. Lowe
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
First-in, first-out buffer system in an integrated circuit
Patent number
6,934,198
Issue date
Aug 23, 2005
Xilinx, Inc.
Wayson J. Lowe
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Digitally controlled impedance for I/O of an integrated circuit device
Patent number
6,489,837
Issue date
Dec 3, 2002
Xilinx, Inc.
David P. Schultz
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Digitally controlled impedance for I/O of an integrated circuit device
Patent number
6,445,245
Issue date
Sep 3, 2002
Xilinx, Inc.
David P. Schultz
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Patents Applications
last 30 patents
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Patent Application
Digitally controlled impedance for I/O of an integrated circuit device
Publication number
20020101278
Publication date
Aug 1, 2002
Xilinx, Inc.
David P. Schultz
H04 - ELECTRIC COMMUNICATION TECHNIQUE