Everardo Torres Flores

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory device architecture
- Patent number 12,119,055
- Issue date Oct 15, 2024
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Interconnection for memory electrodes
- Patent number 11,715,500
- Issue date Aug 1, 2023
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory array with shorting structure on a dummy array thereof, and...
- Patent number 11,195,575
- Issue date Dec 7, 2021
- Intel Corporation
- Jaydip Bharatkumar Patel
- G11 - INFORMATION STORAGE
Information Patent Grant
Interconnection for memory electrodes
- Patent number 11,139,002
- Issue date Oct 5, 2021
- Micron Technology, Inc.
- Hernan A. Castro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Memory device architecture
- Patent number 11,043,267
- Issue date Jun 22, 2021
- Micron Technology, Inc.
- Hernan A. Castro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnection for memory electrodes
- Patent number 10,600,452
- Issue date Mar 24, 2020
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device architecture
- Patent number 10,504,589
- Issue date Dec 10, 2019
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device architecture
- Patent number 10,141,051
- Issue date Nov 27, 2018
- Micron Technology, Inc.
- Hernan A. Castro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnection for memory electrodes
- Patent number 9,767,860
- Issue date Sep 19, 2017
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device architecture
- Patent number 9,734,900
- Issue date Aug 15, 2017
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Connections for memory electrode lines
- Patent number 9,613,902
- Issue date Apr 4, 2017
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Grant
Connections for memory electrode lines
- Patent number 9,443,562
- Issue date Sep 13, 2016
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Grant
Interconnection for memory electrodes
- Patent number 9,378,774
- Issue date Jun 28, 2016
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Metallization scheme for integrated circuit
- Patent number 9,355,718
- Issue date May 31, 2016
- Micron Technology, Inc.
- Everardo Torres Flores
- G11 - INFORMATION STORAGE
Information Patent Grant
Connections for memory electrode lines
- Patent number 9,224,635
- Issue date Dec 29, 2015
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device architecture
- Patent number 9,190,144
- Issue date Nov 17, 2015
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Grant
Metallization scheme for integrated circuit
- Patent number 9,025,398
- Issue date May 5, 2015
- Micron Technology, Inc.
- Everardo Torres Flores
- G11 - INFORMATION STORAGE
Information Patent Grant
Interconnection for memory electrodes
- Patent number 8,891,280
- Issue date Nov 18, 2014
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
NOR GATE BASED LOCAL ACCESS LINE DESELECT SIGNAL GENERATION
- Publication number 20230343384
- Publication date Oct 26, 2023
- Intel Corporation
- Yasir Mohsin Husain
- G11 - INFORMATION STORAGE
Information Patent Application
INTERCONNECTION FOR MEMORY ELECTRODES
- Publication number 20220084560
- Publication date Mar 17, 2022
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY ARRAY WITH SHORTING STRUCTURE ON A DUMMY ARRAY THEREOF, AND...
- Publication number 20210407582
- Publication date Dec 30, 2021
- Intel Corporation
- Jaydip Bharatkumar Patel
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE ARCHITECTURE
- Publication number 20210280242
- Publication date Sep 9, 2021
- Micron Technology, Inc.
- Hernan A. Castro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTION FOR MEMORY ELECTRODES
- Publication number 20200258552
- Publication date Aug 13, 2020
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE ARCHITECTURE
- Publication number 20200152263
- Publication date May 14, 2020
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE ARCHITECTURE
- Publication number 20190013069
- Publication date Jan 10, 2019
- Micron Technology, Inc.
- Hernan A. Castro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE ARCHITECTURE
- Publication number 20190013068
- Publication date Jan 10, 2019
- Micron Technology, Inc.
- Hernan A. Castro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECTION FOR MEMORY ELECTRODES
- Publication number 20190013052
- Publication date Jan 10, 2019
- Micron Technology, Inc.
- Hernan A. Castro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY DEVICE ARCHITECTURE
- Publication number 20170358348
- Publication date Dec 14, 2017
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
CONNECTIONS FOR MEMORY ELECTRODE LINES
- Publication number 20170033042
- Publication date Feb 2, 2017
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Application
INTERCONNECTION FOR MEMORY ELECTRODES
- Publication number 20160351233
- Publication date Dec 1, 2016
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
CONNECTIONS FOR MEMORY ELECTRODE LINES
- Publication number 20160133300
- Publication date May 12, 2016
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE ARCHITECTURE
- Publication number 20160035418
- Publication date Feb 4, 2016
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
METALLIZATION SCHEME FOR INTEGRATED CIRCUIT
- Publication number 20150221366
- Publication date Aug 6, 2015
- Micron Technology, Inc.
- Everardo Torres Flores
- G11 - INFORMATION STORAGE
Information Patent Application
INTERCONNECTION FOR MEMORY ELECTRODES
- Publication number 20150070960
- Publication date Mar 12, 2015
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
CONNECTIONS FOR MEMORY ELECTRODE LINES
- Publication number 20140239512
- Publication date Aug 28, 2014
- Micron Technology, Inc.
- Fabio Pellizzer
- G11 - INFORMATION STORAGE
Information Patent Application
INTERCONNECTION FOR MEMORY ELECTRODES
- Publication number 20140104918
- Publication date Apr 17, 2014
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE ARCHITECTURE
- Publication number 20140104938
- Publication date Apr 17, 2014
- Micron Technology, Inc.
- Hernan A. Castro
- G11 - INFORMATION STORAGE
Information Patent Application
METALLIZATION SCHEME FOR INTEGRATED CIRCUIT
- Publication number 20140104968
- Publication date Apr 17, 2014
- Micron Technology, Inc.
- Everardo Torres Flores
- G11 - INFORMATION STORAGE

Everardo Torres Flores

Person

Patents Grantslast 30 patents

Memory device architecture

Interconnection for memory electrodes

Memory array with shorting structure on a dummy array thereof, and...

Interconnection for memory electrodes

Memory device architecture

Interconnection for memory electrodes

Memory device architecture

Memory device architecture

Interconnection for memory electrodes

Memory device architecture

Connections for memory electrode lines

Connections for memory electrode lines

Interconnection for memory electrodes

Metallization scheme for integrated circuit

Connections for memory electrode lines

Memory device architecture

Metallization scheme for integrated circuit

Interconnection for memory electrodes

Patents Applicationslast 30 patents

NOR GATE BASED LOCAL ACCESS LINE DESELECT SIGNAL GENERATION

INTERCONNECTION FOR MEMORY ELECTRODES

MEMORY ARRAY WITH SHORTING STRUCTURE ON A DUMMY ARRAY THEREOF, AND...

MEMORY DEVICE ARCHITECTURE

INTERCONNECTION FOR MEMORY ELECTRODES

MEMORY DEVICE ARCHITECTURE

MEMORY DEVICE ARCHITECTURE

MEMORY DEVICE ARCHITECTURE

INTERCONNECTION FOR MEMORY ELECTRODES

MEMORY DEVICE ARCHITECTURE

CONNECTIONS FOR MEMORY ELECTRODE LINES

INTERCONNECTION FOR MEMORY ELECTRODES

CONNECTIONS FOR MEMORY ELECTRODE LINES

MEMORY DEVICE ARCHITECTURE

METALLIZATION SCHEME FOR INTEGRATED CIRCUIT

INTERCONNECTION FOR MEMORY ELECTRODES

CONNECTIONS FOR MEMORY ELECTRODE LINES

INTERCONNECTION FOR MEMORY ELECTRODES

MEMORY DEVICE ARCHITECTURE

METALLIZATION SCHEME FOR INTEGRATED CIRCUIT