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Fabrice Lallement
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Aix-les-Bains, FR
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Patents Grants
last 30 patents
Information
Patent Grant
Method for transferring a layer of a semiconductor and substrate co...
Patent number
9,716,029
Issue date
Jul 25, 2017
Soitec
Fabrice Lallement
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Process for bonding two substrates
Patent number
8,999,090
Issue date
Apr 7, 2015
Soitec
Gweltaz Gaudin
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Method for reducing irregularities at the surface of a layer transf...
Patent number
8,946,053
Issue date
Feb 3, 2015
Soitec
Daniel Delprat
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Substrate having a charged zone in an insulating buried layer
Patent number
8,735,946
Issue date
May 27, 2014
Soitec
Mohamad A Shaheen
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Substrate having a charged zone in an insulating buried layer
Patent number
8,535,996
Issue date
Sep 17, 2013
Soitec
Mohamad Shaheen
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Process for fabricating a substrate comprising a deposited buried o...
Patent number
8,343,850
Issue date
Jan 1, 2013
Soitec
Eric Guiot
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
MOS transistor forming method
Patent number
7,416,950
Issue date
Aug 26, 2008
STMicroelectronics S.A.
Damien Lenoble
H01 - BASIC ELECTRIC ELEMENTS
Patents Applications
last 30 patents
Information
Patent Application
SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
Publication number
20140225182
Publication date
Aug 14, 2014
SOITEC
Mohamad A. Shaheen
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
METHOD FOR TRANSFERRING A LAYER OF A SEMICONDUCTOR AND SUBSTRATE CO...
Publication number
20140183601
Publication date
Jul 3, 2014
SOITEC
Fabrice Lallement
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
Publication number
20140015023
Publication date
Jan 16, 2014
SOITEC
Frederic Allibert
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
PROCESS FOR BONDING TWO SUBSTRATES
Publication number
20130139946
Publication date
Jun 6, 2013
SOITEC
Gweltaz Gaudin
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
METHOD FOR REDUCING IRREGULARITIES AT THE SURFACE OF A LAYER TRANSF...
Publication number
20130071997
Publication date
Mar 21, 2013
SOITEC
Daniel Delprat
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
PROCESS FOR MANUFACTURING A STRUCTURE COMPRISING A GERMANIUM LAYER...
Publication number
20110183493
Publication date
Jul 28, 2011
S.O.I TEC SILICON ON INSULATOR TECHNOLOGIES
Nicolas Daval
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
SUBSTRATE HAVING A CHARGED ZONE IN AN INSULATING BURIED LAYER
Publication number
20110012200
Publication date
Jan 20, 2011
S. O. I. Tec Silicon on Insulator Technologies
Frederic Allibert
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
PROCESSING FOR BONDING TWO SUBSTRATES
Publication number
20110000612
Publication date
Jan 6, 2011
Gweltaz Gaudin
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
PROCESS FOR FABRICATING A SUBSTRATE COMPRISING A DEPOSITED BURIED O...
Publication number
20100096733
Publication date
Apr 22, 2010
S. O. I. Tec Silicon on Insulator Technologies
Eric Guiot
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
MOS transistor forming method
Publication number
20060177976
Publication date
Aug 10, 2006
STMicroelectronics S.A.
Damien Lenoble
H01 - BASIC ELECTRIC ELEMENTS