Fakhruddin Ali Bohra

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Concurrent memory access operations
- Patent number 12,159,664
- Issue date Dec 3, 2024
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Concurrent access techniques utilizing wordlines with the same row...
- Patent number 11,776,591
- Issue date Oct 3, 2023
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Column multiplexer circuitry
- Patent number 11,763,880
- Issue date Sep 19, 2023
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Configurable multiplexing circuitry
- Patent number 11,742,001
- Issue date Aug 29, 2023
- ARM Limited
- Fakhruddin Ali Bohra
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulse stretcher circuitry
- Patent number 11,588,477
- Issue date Feb 21, 2023
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit architecture to derive higher mux from lower mux design
- Patent number 11,222,670
- Issue date Jan 11, 2022
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Write assist circuitry
- Patent number 11,004,503
- Issue date May 11, 2021
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Dummy wordline design techniques
- Patent number 10,943,670
- Issue date Mar 9, 2021
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit using discharging circuitries for bit lines
- Patent number 10,878,892
- Issue date Dec 29, 2020
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulse stretcher circuitry
- Patent number 10,873,324
- Issue date Dec 22, 2020
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Routing structures for memory applications
- Patent number 10,839,861
- Issue date Nov 17, 2020
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Coupling compensation circuitry
- Patent number 10,755,774
- Issue date Aug 25, 2020
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Dummy bitline circuitry
- Patent number 10,748,583
- Issue date Aug 18, 2020
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Providing a discharge boundary using bitline discharge control circ...
- Patent number 10,734,065
- Issue date Aug 4, 2020
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Grant
Transition coupling circuitry for memory applications
- Patent number 10,672,459
- Issue date Jun 2, 2020
- ARM Limited
- Yicong Li
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed memory architecture
- Patent number 10,622,038
- Issue date Apr 14, 2020
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Coupling compensation circuitry
- Patent number 10,600,477
- Issue date Mar 24, 2020
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Dummy wordline tracking circuitry
- Patent number 10,269,416
- Issue date Apr 23, 2019
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitline write assist circuitry
- Patent number 10,217,496
- Issue date Feb 26, 2019
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Skewed corner tracking for memory write operations
- Patent number 10,147,482
- Issue date Dec 4, 2018
- ARM Limited
- Jitendra Dasani
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit using shaping and timing circuitries
- Patent number 10,074,410
- Issue date Sep 11, 2018
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit using topology configurations
- Patent number 10,056,121
- Issue date Aug 21, 2018
- ARM Limited
- Mahmood Khayatzadeh
- G11 - INFORMATION STORAGE
Information Patent Grant
Port modes for use with memory
- Patent number 10,049,709
- Issue date Aug 14, 2018
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Grant
SRAM architecture with bitcells of varying speed and density
- Patent number 9,953,701
- Issue date Apr 24, 2018
- ARM Limited
- Fakhruddin Ali Bohra
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy schemes for memory cell repair
- Patent number 9,911,510
- Issue date Mar 6, 2018
- ARM Limited
- Jungtae Kwon
- G11 - INFORMATION STORAGE
Information Patent Grant
Read assist circuitry
- Patent number 9,824,749
- Issue date Nov 21, 2017
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Redundancy schemes for memory
- Patent number 9,711,243
- Issue date Jul 18, 2017
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit using topology configurations
- Patent number 9,589,601
- Issue date Mar 7, 2017
- ARM Limited
- Mahmood Khayatzadeh
- G11 - INFORMATION STORAGE
Information Patent Grant
High density memory architecture
- Patent number 9,583,209
- Issue date Feb 28, 2017
- ARM Limited
- Rajiv Kumar Roy
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Column Multiplexer Circuitry
- Publication number 20240005985
- Publication date Jan 4, 2024
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Configurable Multiplexing Circuitry
- Publication number 20210335397
- Publication date Oct 28, 2021
- ARM Limited
- Fakhruddin Ali Bohra
- G11 - INFORMATION STORAGE
Information Patent Application
Column Multiplexer Circuitry
- Publication number 20210304816
- Publication date Sep 30, 2021
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Write Assist Circuitry
- Publication number 20210158865
- Publication date May 27, 2021
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Pulse Stretcher Circuitry
- Publication number 20210111711
- Publication date Apr 15, 2021
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Access Techniques
- Publication number 20210110853
- Publication date Apr 15, 2021
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit Architecture to Derive Higher Mux From Lower Mux Design
- Publication number 20210110851
- Publication date Apr 15, 2021
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Column Multiplexing Techniques
- Publication number 20210110867
- Publication date Apr 15, 2021
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Read and Write Access Techniques
- Publication number 20210098032
- Publication date Apr 1, 2021
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Dummy Wordline Design Techniques
- Publication number 20210065839
- Publication date Mar 4, 2021
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Bitline Precharge Circuitry
- Publication number 20200388309
- Publication date Dec 10, 2020
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Coupling Compensation Circuitry
- Publication number 20200219559
- Publication date Jul 9, 2020
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Application
Pulse Stretcher Circuitry
- Publication number 20200014373
- Publication date Jan 9, 2020
- ARM Limited
- Shri Sagar Dwivedi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High-Speed Memory Architecture
- Publication number 20200005836
- Publication date Jan 2, 2020
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Coupling Compensation Circuitry
- Publication number 20190325948
- Publication date Oct 24, 2019
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit Using Discharging Circuitries for Bit Lines
- Publication number 20190325949
- Publication date Oct 24, 2019
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Transition Coupling Circuitry for Memory Applications
- Publication number 20190244656
- Publication date Aug 8, 2019
- ARM Limited
- Yicong Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Routing Structures for Memory Applications
- Publication number 20190237111
- Publication date Aug 1, 2019
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Application
Dummy Bitline Circuitry
- Publication number 20190198064
- Publication date Jun 27, 2019
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Dummy Wordline Tracking Circuitry
- Publication number 20190122724
- Publication date Apr 25, 2019
- ARM Limited
- Lalit Gupta
- G11 - INFORMATION STORAGE
Information Patent Application
Bitline Discharge Control Circuitry
- Publication number 20190066770
- Publication date Feb 28, 2019
- ARM Limited
- Rajiv Kumar Sisodia
- G11 - INFORMATION STORAGE
Information Patent Application
Skewed Corner Tracking for Memory Write Operations
- Publication number 20180268894
- Publication date Sep 20, 2018
- ARM Limited
- Jitendra Dasani
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit Using Shaping and Timing Circuitries
- Publication number 20180096715
- Publication date Apr 5, 2018
- ARM Limited
- Vivek Nautiyal
- G11 - INFORMATION STORAGE
Information Patent Application
Port Modes for Use With Memory
- Publication number 20170194046
- Publication date Jul 6, 2017
- ARM Limited
- Gus Yeung
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Circuit Using Topology Configurations
- Publication number 20170178700
- Publication date Jun 22, 2017
- ARM Limited
- Mahmood Khayatzadeh
- G11 - INFORMATION STORAGE
Information Patent Application
INTEGRATED CIRCUIT USING TOPOLOGY CONFIGURATIONS
- Publication number 20160276000
- Publication date Sep 22, 2016
- ARM Limited
- Mahmood Khayatzadeh
- G11 - INFORMATION STORAGE

Fakhruddin Ali Bohra

Person

Patents Grantslast 30 patents

Concurrent memory access operations

Concurrent access techniques utilizing wordlines with the same row...

Column multiplexer circuitry

Configurable multiplexing circuitry

Pulse stretcher circuitry

Circuit architecture to derive higher mux from lower mux design

Write assist circuitry

Dummy wordline design techniques

Integrated circuit using discharging circuitries for bit lines

Pulse stretcher circuitry

Routing structures for memory applications

Coupling compensation circuitry

Dummy bitline circuitry

Providing a discharge boundary using bitline discharge control circ...

Transition coupling circuitry for memory applications

High-speed memory architecture

Coupling compensation circuitry

Dummy wordline tracking circuitry

Bitline write assist circuitry

Skewed corner tracking for memory write operations

Integrated circuit using shaping and timing circuitries

Integrated circuit using topology configurations

Port modes for use with memory

SRAM architecture with bitcells of varying speed and density

Redundancy schemes for memory cell repair

Read assist circuitry

Redundancy schemes for memory

Integrated circuit using topology configurations

High density memory architecture

Patents Applicationslast 30 patents

Column Multiplexer Circuitry

Configurable Multiplexing Circuitry

Column Multiplexer Circuitry

Write Assist Circuitry

Pulse Stretcher Circuitry

Memory Access Techniques

Circuit Architecture to Derive Higher Mux From Lower Mux Design

Column Multiplexing Techniques

Read and Write Access Techniques

Dummy Wordline Design Techniques

Bitline Precharge Circuitry

Coupling Compensation Circuitry

Pulse Stretcher Circuitry

High-Speed Memory Architecture

Coupling Compensation Circuitry

Integrated Circuit Using Discharging Circuitries for Bit Lines

Transition Coupling Circuitry for Memory Applications

Routing Structures for Memory Applications

Dummy Bitline Circuitry

Dummy Wordline Tracking Circuitry

Bitline Discharge Control Circuitry

Skewed Corner Tracking for Memory Write Operations

Integrated Circuit Using Shaping and Timing Circuitries

Port Modes for Use With Memory

Integrated Circuit Using Topology Configurations

INTEGRATED CIRCUIT USING TOPOLOGY CONFIGURATIONS