Fanling H. Yang

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Vertical semiconductor device having frontside interconnections
- Patent number 9,673,316
- Issue date Jun 6, 2017
- Maxim Integrated Products, Inc.
- Christopher S. Blair
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
LDMOS with field plate connected to gate
- Patent number 9,450,074
- Issue date Sep 20, 2016
- Maxim Integrated Products, Inc.
- Fanling Hsu Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated monolithic galvanic isolator
- Patent number 9,209,091
- Issue date Dec 8, 2015
- Maxim Integrated Products, Inc.
- David Harper
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned NPN transistor with raised extrinsic base
- Patent number 7,026,666
- Issue date Apr 11, 2006
- Maxim Integrated Products, Inc.
- Alexander Kalnitsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming self-aligned NPN transistor with raised extrinsic...
- Patent number 6,767,798
- Issue date Jul 27, 2004
- Maxim Integrated Products, Inc.
- Alexander Kalnitsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming self-aligned bipolar transistor
- Patent number 6,686,250
- Issue date Feb 3, 2004
- Maxim Integrated Products, Inc.
- Alexander Kalnitsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a shallow and deep trench isolation (SDTI) suitab...
- Patent number 6,303,413
- Issue date Oct 16, 2001
- Maxim Integrated Products, Inc.
- Alexander Kalnitsky
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Self-aligned NPN transistor with raised extrinsic base
- Publication number 20040126978
- Publication date Jul 1, 2004
- Alexander Kalnitsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Self-aligned NPN transistor with raised extrinsic base
- Publication number 20030189239
- Publication date Oct 9, 2003
- Alexander Kalnitsky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Forming devices on a semiconductor substrate
- Publication number 20020173092
- Publication date Nov 21, 2002
- Tadanori Yamaguchi
- H01 - BASIC ELECTRIC ELEMENTS

Fanling H. Yang

Person

Patents Grantslast 30 patents

Vertical semiconductor device having frontside interconnections

LDMOS with field plate connected to gate

Integrated monolithic galvanic isolator

Self-aligned NPN transistor with raised extrinsic base

Method of forming self-aligned NPN transistor with raised extrinsic...

Method of forming self-aligned bipolar transistor

Method of forming a shallow and deep trench isolation (SDTI) suitab...

Patents Applicationslast 30 patents

Self-aligned NPN transistor with raised extrinsic base

Self-aligned NPN transistor with raised extrinsic base

Forming devices on a semiconductor substrate