TREA

Fatha Khalsa

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  • San Jose, CA, US
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Patents Grantslast 30 patents

  • Information Patent Grant

    Impedance optimized chip system
    • Patent number 8,482,114
    • Issue date Jul 9, 2013
    • NXP B.V.
    • James Raymond Spehar
    • G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

  • Information Patent Application

    IMPEDANCE OPTIMIZED CHIP SYSTEM
    • Publication number 20130268909
    • Publication date Oct 10, 2013
    • James Raymond SPEHAR
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    IMPEDANCE OPTIMIZED CHIP SYSTEM
    • Publication number 20110057302
    • Publication date Mar 10, 2011
    • NXP B.V.
    • James Raymond Spehar
    • G06 - COMPUTING CALCULATING COUNTING