Fedor G. Pikus

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for photolithographic design
- Patent number 11,275,884
- Issue date Mar 15, 2022
- SIEMENS INDUSTRY SOFTWARE INC.
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for patterning color assignment
- Patent number 10,908,511
- Issue date Feb 2, 2021
- Mentor Graphics Corporation
- Fedor G Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fabric-independent multi-patterning
- Patent number 10,895,864
- Issue date Jan 19, 2021
- Mentor Graphics Corporation
- Fedor G Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Invariant property-based clustering of circuit images for electroni...
- Patent number 10,872,191
- Issue date Dec 22, 2020
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Limited basis quantum particle definitions in applications of quant...
- Patent number 10,846,448
- Issue date Nov 24, 2020
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for photolithographic design
- Patent number 10,789,408
- Issue date Sep 29, 2020
- Mentor Graphics Corporation
- Fedor G Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Properties in electronic design automation
- Patent number 10,643,015
- Issue date May 5, 2020
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic-driven layout verification
- Patent number 10,596,219
- Issue date Mar 24, 2020
- Mentor Graphics Corporation
- Sridhar Srinivasan
- A61 - MEDICAL OR VETERINARY SCIENCE HYGIENE
Information Patent Grant
Simultaneous multi-layer fill generation
- Patent number 10,552,565
- Issue date Feb 4, 2020
- Mentor Graphics Corporation
- Eugene Anikin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Preserving hierarchy and coloring uniformity in multi-patterning la...
- Patent number 10,311,197
- Issue date Jun 4, 2019
- Mentor Graphics Corporation
- Fedor G Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electrostatic damage protection circuitry verification
- Patent number 10,210,302
- Issue date Feb 19, 2019
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical fill in a design layout
- Patent number 9,940,428
- Issue date Apr 10, 2018
- Mentor Graphics Corporation
- Fedor Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optical physical uncloneable function
- Patent number 9,729,317
- Issue date Aug 8, 2017
- Mentor Graphics Corporation
- Fedor Pikus
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Simultaneous multi-layer fill generation
- Patent number 9,652,574
- Issue date May 16, 2017
- Mentor Graphics Corporation
- Eugene Anikin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Directed self-assembly-aware layout decomposition for multiple patt...
- Patent number 9,652,581
- Issue date May 16, 2017
- Mentor Graphics Corporation
- Fedor Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simultaneous multi-layer fill generation
- Patent number 9,507,902
- Issue date Nov 29, 2016
- Mentor Graphics Corporation
- Eugene Anikin
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Logic injection
- Patent number 8,751,981
- Issue date Jun 10, 2014
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Model-based design verification
- Patent number 8,612,919
- Issue date Dec 17, 2013
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hybrid hotspot detection
- Patent number 8,504,949
- Issue date Aug 6, 2013
- Mentor Graphics Corporation
- Juan Andres Torres Robles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure exchange of information in electronic design automation
- Patent number 8,302,039
- Issue date Oct 30, 2012
- Mentor Graphics Corporation
- John G. Ferguson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Logic injection
- Patent number 8,225,246
- Issue date Jul 17, 2012
- Mentor Graphics Corp.
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic injection
- Patent number 7,716,611
- Issue date May 11, 2010
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure exchange of information in electronic design automation
- Patent number 7,698,664
- Issue date Apr 13, 2010
- John G. Ferguson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure exchange of information in electronic design automation
- Patent number 7,353,468
- Issue date Apr 1, 2008
- John G. Ferguson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Secure exchange of information in electronic design automation
- Patent number 7,222,312
- Issue date May 22, 2007
- John G. Ferguson
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ADAPTIVE PENALTY TERM DETERMINATIONS IN APPLICATIONS OF QUANTUM COM...
- Publication number 20210150001
- Publication date May 20, 2021
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PHOTOLITHOGRAPHIC DESIGN
- Publication number 20200387661
- Publication date Dec 10, 2020
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FABRIC-INDEPENDENT MULTI-PATTERNING
- Publication number 20190361425
- Publication date Nov 28, 2019
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PATTERNING COLOR ASSIGNMENT
- Publication number 20190325612
- Publication date Oct 24, 2019
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PHOTOLITHOGRAPHIC DESIGN
- Publication number 20190325106
- Publication date Oct 24, 2019
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Preserving Hierarchy And Coloring Uniformity In Multi-Patterning La...
- Publication number 20170242953
- Publication date Aug 24, 2017
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Directed Self-Assembly-Aware Layout Decomposition For Multiple Patt...
- Publication number 20170220729
- Publication date Aug 3, 2017
- Mentor Graphics Corporation
- Fedor Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Simultaneous Multi-Layer Fill Generation
- Publication number 20170147732
- Publication date May 25, 2017
- Mentor Graphics Corporation
- Eugene Anikin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Directed Self-Assembly-Aware Layout Decomposition For Multiple Patt...
- Publication number 20160292345
- Publication date Oct 6, 2016
- Mentor Graphics Corporation
- Fedor Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electrostatic Damage Protection Circuitry Verification
- Publication number 20160117437
- Publication date Apr 28, 2016
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL FILL IN A DESIGN LAYOUT
- Publication number 20160098512
- Publication date Apr 7, 2016
- Mentor Graphics Corporation
- Fedor Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTICAL PHYSICAL UNCLONEABLE FUNCTION
- Publication number 20150215115
- Publication date Jul 30, 2015
- Mentor Graphics Corporation
- Fedor Pikus
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MODULAR PLATFORM FOR INTEGRATED CIRCUIT DESIGN ANALYSIS AND VERIFIC...
- Publication number 20140337810
- Publication date Nov 13, 2014
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtual Flat Traversal Of A Hierarchical Circuit Design
- Publication number 20130198703
- Publication date Aug 1, 2013
- Ziyang Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTROSTATIC DAMAGE PROTECTION CIRCUITRY VERIFICATION
- Publication number 20130080985
- Publication date Mar 28, 2013
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hybrid Hotspot Detection
- Publication number 20130031518
- Publication date Jan 31, 2013
- Juan Andres Torres Robles
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Logic Injection
- Publication number 20120266117
- Publication date Oct 18, 2012
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method For Improving Circuit Design Robustness
- Publication number 20120198394
- Publication date Aug 2, 2012
- FEDOR G. PIKUS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Simultaneous Multi-Layer Fill Generation
- Publication number 20110289471
- Publication date Nov 24, 2011
- Eugene Anikin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Modular Platform For Integrated Circuit Design Analysis And Verific...
- Publication number 20110145772
- Publication date Jun 16, 2011
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Device Annotation
- Publication number 20110145770
- Publication date Jun 16, 2011
- Phillip A. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Property-Based Classification In Electronic Design Automation
- Publication number 20100229133
- Publication date Sep 9, 2010
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE EXCHANGE OF INFORMATION IN ELECTRONIC DESIGN AUTOMATION
- Publication number 20100199107
- Publication date Aug 5, 2010
- John G. Ferguson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Topological Pattern Matching
- Publication number 20100185994
- Publication date Jul 22, 2010
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electrostatic Damage Protection Circuitry Verification
- Publication number 20100185995
- Publication date Jul 22, 2010
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Logic Injection
- Publication number 20100162192
- Publication date Jun 24, 2010
- Mentor Graphics Corporation
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Critical Area Deterministic Sampling
- Publication number 20100023905
- Publication date Jan 28, 2010
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Property-Based Classification In Electronic Design Automation
- Publication number 20100023897
- Publication date Jan 28, 2010
- Fedor G. Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Electronic Design Automation Process Restart
- Publication number 20090319579
- Publication date Dec 24, 2009
- Fedor Pikus
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Layout-Versus-Schematic Analysis For Symmetric Circuits
- Publication number 20090235213
- Publication date Sep 17, 2009
- Xin Hao
- G06 - COMPUTING CALCULATING COUNTING

Fedor G. Pikus

Person

Patents Grantslast 30 patents

Systems and methods for photolithographic design

Systems and methods for patterning color assignment

Fabric-independent multi-patterning

Invariant property-based clustering of circuit images for electroni...

Limited basis quantum particle definitions in applications of quant...

Systems and methods for photolithographic design

Properties in electronic design automation

Logic-driven layout verification

Simultaneous multi-layer fill generation

Preserving hierarchy and coloring uniformity in multi-patterning la...

Electrostatic damage protection circuitry verification

Hierarchical fill in a design layout

Optical physical uncloneable function

Simultaneous multi-layer fill generation

Directed self-assembly-aware layout decomposition for multiple patt...

Simultaneous multi-layer fill generation

Logic injection

Model-based design verification

Hybrid hotspot detection

Secure exchange of information in electronic design automation

Logic injection

Logic injection

Secure exchange of information in electronic design automation

Secure exchange of information in electronic design automation

Secure exchange of information in electronic design automation

Patents Applicationslast 30 patents

ADAPTIVE PENALTY TERM DETERMINATIONS IN APPLICATIONS OF QUANTUM COM...

SYSTEMS AND METHODS FOR PHOTOLITHOGRAPHIC DESIGN

FABRIC-INDEPENDENT MULTI-PATTERNING

SYSTEMS AND METHODS FOR PATTERNING COLOR ASSIGNMENT

SYSTEMS AND METHODS FOR PHOTOLITHOGRAPHIC DESIGN

Preserving Hierarchy And Coloring Uniformity In Multi-Patterning La...

Directed Self-Assembly-Aware Layout Decomposition For Multiple Patt...

Simultaneous Multi-Layer Fill Generation

Directed Self-Assembly-Aware Layout Decomposition For Multiple Patt...

Electrostatic Damage Protection Circuitry Verification

HIERARCHICAL FILL IN A DESIGN LAYOUT

OPTICAL PHYSICAL UNCLONEABLE FUNCTION

MODULAR PLATFORM FOR INTEGRATED CIRCUIT DESIGN ANALYSIS AND VERIFIC...

Virtual Flat Traversal Of A Hierarchical Circuit Design

ELECTROSTATIC DAMAGE PROTECTION CIRCUITRY VERIFICATION

Hybrid Hotspot Detection

Logic Injection

Method For Improving Circuit Design Robustness

Simultaneous Multi-Layer Fill Generation

Modular Platform For Integrated Circuit Design Analysis And Verific...

Device Annotation

Property-Based Classification In Electronic Design Automation

SECURE EXCHANGE OF INFORMATION IN ELECTRONIC DESIGN AUTOMATION

Topological Pattern Matching

Electrostatic Damage Protection Circuitry Verification

Logic Injection

Critical Area Deterministic Sampling

Property-Based Classification In Electronic Design Automation

Electronic Design Automation Process Restart

Layout-Versus-Schematic Analysis For Symmetric Circuits