Feng Liu

Person

Waterloo, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Scrambling sequence design for multi-mode block discrimination on D...
- Patent number 11,405,245
- Issue date Aug 2, 2022
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scrambling sequence design for embedding receiver ID into frozen bi...
- Patent number 11,350,404
- Issue date May 31, 2022
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scrambling sequence design for embedding receiver ID into frozen bi...
- Patent number 10,887,879
- Issue date Jan 5, 2021
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scrambling sequence design for embedding receiver ID into frozen bi...
- Patent number 10,560,932
- Issue date Feb 11, 2020
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scrambling sequence design for multi-mode block discrimination on D...
- Patent number 10,536,305
- Issue date Jan 14, 2020
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scrambling sequence design for embedding UE ID into frozen bits for...
- Patent number 10,383,106
- Issue date Aug 13, 2019
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scrambling sequence design for multi-mode block discrimination on D...
- Patent number 10,327,235
- Issue date Jun 18, 2019
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Scrambling Sequence Design for Embedding Receiver ID into Frozen Bi...
- Publication number 20210219272
- Publication date Jul 15, 2021
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Scrambling Sequence Design for Embedding Receiver ID into Frozen Bi...
- Publication number 20200196286
- Publication date Jun 18, 2020
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Scrambling Sequence Design for Multi-Mode Block Discrimination on D...
- Publication number 20200099553
- Publication date Mar 26, 2020
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Scrambling Sequence Design for Embedding Receiver ID into Frozen Bi...
- Publication number 20190327722
- Publication date Oct 24, 2019
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Scrambling Sequence Design for Multi-Mode Block Discrimination on D...
- Publication number 20190052487
- Publication date Feb 14, 2019
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Scrambling Sequence Design for Multi-Mode Block Discrimination on D...
- Publication number 20180192402
- Publication date Jul 5, 2018
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Scrambling Sequence Design for Embedding UE ID into Frozen Bits for...
- Publication number 20180192403
- Publication date Jul 5, 2018
- Coherent Logix, Incorporated
- Kevin A. Shelby
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Scrambling sequence design for multi-mode block discrimination on D...

Scrambling sequence design for embedding receiver ID into frozen bi...

Scrambling sequence design for embedding receiver ID into frozen bi...

Scrambling sequence design for embedding receiver ID into frozen bi...

Scrambling sequence design for multi-mode block discrimination on D...

Scrambling sequence design for embedding UE ID into frozen bits for...

Scrambling sequence design for multi-mode block discrimination on D...

Patents Applicationslast 30 patents

Scrambling Sequence Design for Embedding Receiver ID into Frozen Bi...

Scrambling Sequence Design for Embedding Receiver ID into Frozen Bi...

Scrambling Sequence Design for Multi-Mode Block Discrimination on D...

Scrambling Sequence Design for Embedding Receiver ID into Frozen Bi...

Scrambling Sequence Design for Multi-Mode Block Discrimination on D...

Scrambling Sequence Design for Multi-Mode Block Discrimination on D...

Scrambling Sequence Design for Embedding UE ID into Frozen Bits for...