Francesco Lertora

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S. Colombano Certenoli, IT

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Patents Grantslast 30 patents

Information Patent Grant
Estimating diagnostic coverage in IC design based on static COI ana...
- Patent number 11,416,662
- Issue date Aug 16, 2022
- Cadence Design Systems, Inc.
- Antonino Armato
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic gate-level FS analysis and FMEDA
- Patent number 10,853,545
- Issue date Dec 1, 2020
- Cadence Design Systems, Inc.
- Alessandra Nardi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture for dynamically reconfigurable system-on-chip arrangem...
- Patent number 7,818,163
- Issue date Oct 19, 2010
- STMicroelectronics S.r.l.
- Francesco Lertora
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reconfigurable signal processing IC with an embedded flash memory d...
- Patent number 7,360,068
- Issue date Apr 15, 2008
- STMicroelectronics S.r.l.
- Michele Borgatti
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Architecture for dynamically reconfigurable system-on-chip arrangem...
- Publication number 20070088537
- Publication date Apr 19, 2007
- STMicroelectronics S.r.l.
- Francesco Lertora
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Reconfigurable signal processing IC with an embedded flash memory d...
- Publication number 20040230771
- Publication date Nov 18, 2004
- STMicroelectronics S.r.l.
- Michele Borgatti
- G06 - COMPUTING CALCULATING COUNTING