Francisco H. DeLaMoneda

Person

Stormville, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
EEPROM device and method for providing lower programming voltage
- Patent number 6,953,974
- Issue date Oct 11, 2005
- Texas Instruments Incorporated
- Peter A. Rathfelder
- G11 - INFORMATION STORAGE
Information Patent Grant
Making LSI devices with double level polysilicon structures
- Patent number 4,458,406
- Issue date Jul 10, 1984
- IBM Corporation
- Francisco H. De La Moneda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOSFET Structure and process to form micrometer long source/drain s...
- Patent number 4,445,267
- Issue date May 1, 1984
- International Business Machines Corporation
- Francisco H. De La Moneda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simultaneously forming fully implanted DMOS together with enhanceme...
- Patent number 4,329,186
- Issue date May 11, 1982
- IBM Corporation
- Harish N. Kotecha
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a dual DMOS device by ion implantation and diffusion
- Patent number 4,280,855
- Issue date Jul 28, 1981
- IBM Corporation
- Claude L. Bertin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabrication of merged transistor logic (MTL) cells
- Patent number 4,149,906
- Issue date Apr 17, 1979
- International Business Machines Corporation
- Francisco H. De La Moneda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Over voltage protective device and circuits for insulated gate tran...
- Patent number 4,139,935
- Issue date Feb 20, 1979
- International Business Machines Corporation
- Claude L. Bertin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Inverter with improved load line characteristic
- Patent number 4,138,782
- Issue date Feb 13, 1979
- International Business Machines Corporation
- Francisco H. De La Moneda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Charge pumping device with integrated regulating capacitor and meth...
- Patent number 4,115,794
- Issue date Sep 19, 1978
- International Business Machines Corporation
- Francisco H. De La Moneda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a low breakdown voltage device for polysili...
- Patent number 4,102,714
- Issue date Jul 25, 1978
- International Business Machines Corporation
- David E. DeBar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Two and three mask process for IGFET fabrication
- Patent number 4,102,733
- Issue date Jul 25, 1978
- International Business Machines Corporation
- Francisco H. De La Moneda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Phototransistor array having uniform current response and method of...
- Patent number 4,078,243
- Issue date Mar 7, 1978
- International Business Machines Corporation
- David E. De Bar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Raised source and drain igfet device fabrication
- Patent number 4,072,545
- Issue date Feb 7, 1978
- International Business Machines Corp.
- Francisco H. De La Moneda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
FET inverter with isolated substrate load
- Patent number 4,072,868
- Issue date Feb 7, 1978
- International Business Machines Corporation
- Francisco H. De La Moneda
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method to fabricate ion-implanted layers with abrupt edges to reduc...
- Patent number 4,029,522
- Issue date Jun 14, 1977
- International Business Machines Corporation
- Francisco H. De La Moneda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Raised source and drain IGFET device and method
- Patent number 4,016,587
- Issue date Apr 5, 1977
- International Business Machines Corporation
- Francisco H. De La Moneda
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Three mask self aligned IGFET fabrication process
- Patent number 3,958,323
- Issue date May 25, 1976
- International Business Machines Corporation
- Francisco H. De La Moneda
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
EEPROM device and method for providing lower programming voltage
- Publication number 20050047211
- Publication date Mar 3, 2005
- TEXAS INSTRUMENTS INCORPORATED
- Peter A. Rathfelder
- G11 - INFORMATION STORAGE

Francisco H. DeLaMoneda

Person

Patents Grantslast 30 patents

EEPROM device and method for providing lower programming voltage

Making LSI devices with double level polysilicon structures

MOSFET Structure and process to form micrometer long source/drain s...

Simultaneously forming fully implanted DMOS together with enhanceme...

Method of making a dual DMOS device by ion implantation and diffusion

Process for fabrication of merged transistor logic (MTL) cells

Over voltage protective device and circuits for insulated gate tran...

Inverter with improved load line characteristic

Charge pumping device with integrated regulating capacitor and meth...

Process for fabricating a low breakdown voltage device for polysili...

Two and three mask process for IGFET fabrication

Phototransistor array having uniform current response and method of...

Raised source and drain igfet device fabrication

FET inverter with isolated substrate load

Method to fabricate ion-implanted layers with abrupt edges to reduc...

Raised source and drain IGFET device and method

Three mask self aligned IGFET fabrication process

Patents Applicationslast 30 patents

EEPROM device and method for providing lower programming voltage