Franco Maloberti

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and circuits for output of sample-and-hold in pipelined ADC
- Patent number 7,385,536
- Issue date Jun 10, 2008
- Texas Instruments Incorporated
- Martin Kithinji Kinyua
- G11 - INFORMATION STORAGE
Information Patent Grant
Switched-capacitor circuits with reduced finite-gain effect
- Patent number 7,126,415
- Issue date Oct 24, 2006
- Texas Instruments Incorporated
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Continuous digital background calibration in pipelined ADC architec...
- Patent number 7,107,175
- Issue date Sep 12, 2006
- Texas Instruments Incorporated
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Switched-capacitor circuits with reduced finite-gain effect
- Patent number 7,068,203
- Issue date Jun 27, 2006
- Texas Instruments Incorporated
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Continuous digital background calibration in pipelined ADC architec...
- Patent number 7,035,756
- Issue date Apr 25, 2006
- Texas Instruments Incorporated
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for reducing DAC resolution in multi-bit sigma delta analog-...
- Patent number 6,980,144
- Issue date Dec 27, 2005
- Texas Instruments Incorporated
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sigma-delta analog-to-digital converter (ADC) with truncation error...
- Patent number 6,967,608
- Issue date Nov 22, 2005
- Texas Instruments Incorporated
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and circuit for reducing quantizer input/output swing in a s...
- Patent number 6,940,438
- Issue date Sep 6, 2005
- Texas Instruments Incorporated
- Wem Ming Koe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus for generating at least one digital output signal represe...
- Patent number 6,696,998
- Issue date Feb 24, 2004
- Texas Instruments Incorporated
- Feng Ying
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Methods and circuits for output of sample-and-hold in pipelined ADC
- Publication number 20060125678
- Publication date Jun 15, 2006
- Martin Kithinji Kinyua
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Switched-capacitor circuits with reduced finite-gain effect
- Publication number 20060071709
- Publication date Apr 6, 2006
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Continuous digital background calibration in pipelined ADC architec...
- Publication number 20060031037
- Publication date Feb 9, 2006
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR REDUCING DAC RESOLUTION IN MULTI-BIT SIGMA DELTA ANALOG-...
- Publication number 20050270201
- Publication date Dec 8, 2005
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND CIRCUIT FOR REDUCING QUANTIZER INPUT/OUTPUT SWING IN A S...
- Publication number 20050162296
- Publication date Jul 28, 2005
- Wem Ming Koe
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Switched-capacitor circuits with reduced finite-gain effect
- Publication number 20050140433
- Publication date Jun 30, 2005
- TEXAS INSTRUMENTS INCORPORATED
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Continuous digital background calibration in pipelined ADC architec...
- Publication number 20050137802
- Publication date Jun 23, 2005
- Franco Maloberti
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus for generating at least one digital output signal represe...
- Publication number 20030222805
- Publication date Dec 4, 2003
- Feng Ying
- H03 - BASIC ELECTRONIC CIRCUITRY

Franco Maloberti

Person

Patents Grantslast 30 patents

Methods and circuits for output of sample-and-hold in pipelined ADC

Switched-capacitor circuits with reduced finite-gain effect

Continuous digital background calibration in pipelined ADC architec...

Switched-capacitor circuits with reduced finite-gain effect

Continuous digital background calibration in pipelined ADC architec...

Method for reducing DAC resolution in multi-bit sigma delta analog-...

Sigma-delta analog-to-digital converter (ADC) with truncation error...

Method and circuit for reducing quantizer input/output swing in a s...

Apparatus for generating at least one digital output signal represe...

Patents Applicationslast 30 patents

Methods and circuits for output of sample-and-hold in pipelined ADC

Switched-capacitor circuits with reduced finite-gain effect

Continuous digital background calibration in pipelined ADC architec...

METHOD FOR REDUCING DAC RESOLUTION IN MULTI-BIT SIGMA DELTA ANALOG-...

METHOD AND CIRCUIT FOR REDUCING QUANTIZER INPUT/OUTPUT SWING IN A S...

Switched-capacitor circuits with reduced finite-gain effect

Continuous digital background calibration in pipelined ADC architec...

Apparatus for generating at least one digital output signal represe...