Franco Ricci

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Control—mechanism for selectively shorting clock grid by electrical...
- Patent number 9,436,210
- Issue date Sep 6, 2016
- Marvell International Ltd.
- Kim Schuttenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic pipeline reconfiguration including changing a number of stages
- Patent number 8,806,181
- Issue date Aug 12, 2014
- Marvell International Ltd
- R. Frank O'Bleness
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective shorting for clock grid during a controlling portion of a...
- Patent number 8,607,090
- Issue date Dec 10, 2013
- Marvell International Ltd.
- Kim Schuttenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
State-retentive scan latch
- Patent number 7,796,445
- Issue date Sep 14, 2010
- Marvell International, Ltd.
- Manish Biyani
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory driver architecture and associated methods
- Patent number 7,200,060
- Issue date Apr 3, 2007
- Intel Corporation
- Timothy S. Beatty
- G11 - INFORMATION STORAGE
Information Patent Grant
Level shifter and voltage translator
- Patent number 6,774,696
- Issue date Aug 10, 2004
- Intel Corporation
- Lawrence T. Clark
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low power state retention
- Patent number 6,775,180
- Issue date Aug 10, 2004
- Intel Corporation
- Manish Biyani
- G11 - INFORMATION STORAGE
Information Patent Grant
Low standby power using shadow storage
- Patent number 6,639,827
- Issue date Oct 28, 2003
- Intel Corporation
- Lawrence T. Clark
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory address translations for programs code execution/relocation
- Patent number 5,909,702
- Issue date Jun 1, 1999
- Intel Corporation
- Marc Jalfon
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SELECTIVE SHORTING FOR CLOCK GRID
- Publication number 20120054530
- Publication date Mar 1, 2012
- Kim SCHUTTENBERG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory driver architecture and associated methods
- Publication number 20050013190
- Publication date Jan 20, 2005
- Timothy S. Beatty
- G11 - INFORMATION STORAGE
Information Patent Application
Reducing integrated circuit power consumption
- Publication number 20040128574
- Publication date Jul 1, 2004
- Franco Ricci
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER STATE RETENTION
- Publication number 20040120182
- Publication date Jun 24, 2004
- Manish Biyani
- G11 - INFORMATION STORAGE
Information Patent Application
LEVEL SHIFTER AND VOLTAGE TRANSLATOR
- Publication number 20040113677
- Publication date Jun 17, 2004
- Lawrence T. Clark
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW STANDBY POWER USING SHADOW STORAGE
- Publication number 20030174534
- Publication date Sep 18, 2003
- Lawrence T. Clark
- G11 - INFORMATION STORAGE

Franco Ricci

Person

Patents Grantslast 30 patents

Control—mechanism for selectively shorting clock grid by electrical...

Dynamic pipeline reconfiguration including changing a number of stages

Selective shorting for clock grid during a controlling portion of a...

State-retentive scan latch

Memory driver architecture and associated methods

Level shifter and voltage translator

Low power state retention

Low standby power using shadow storage

Memory address translations for programs code execution/relocation

Patents Applicationslast 30 patents

SELECTIVE SHORTING FOR CLOCK GRID

Memory driver architecture and associated methods

Reducing integrated circuit power consumption

LOW POWER STATE RETENTION

LEVEL SHIFTER AND VOLTAGE TRANSLATOR

LOW STANDBY POWER USING SHADOW STORAGE