Francois Ducaroir

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Serial data transmitter with bit doubling
- Patent number 7,342,977
- Issue date Mar 11, 2008
- LSI Logic Corporation
- Michael O. Jenkins
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Serial data transceiver including elements which facilitate functio...
- Patent number 6,341,142
- Issue date Jan 22, 2002
- LSI Logic Corporation
- Francois Ducaroir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Serial data transceiver architecture and test method for measuring...
- Patent number 6,331,999
- Issue date Dec 18, 2001
- LSI Logic Corporation
- Francois Ducaroir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
High speed serial line transceivers integrated into a cache control...
- Patent number 6,330,591
- Issue date Dec 11, 2001
- LSI Logic Corporation
- Francois Ducaroir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for testing the ability of a pair of serial da...
- Patent number 6,208,621
- Issue date Mar 27, 2001
- LSI Logic Corporation
- Francois Ducaroir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using multiple high speed serial lines to transmit high data rates...
- Patent number 6,167,077
- Issue date Dec 26, 2000
- LSI Logic Corporation
- Francois Ducaroir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Enhanced receiving chip for a computer monitor
- Patent number 6,085,257
- Issue date Jul 4, 2000
- LSI Logic Corporation
- Francois Ducaroir
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
System for sending data from-and-to a computer monitor using a high...
- Patent number 6,061,747
- Issue date May 9, 2000
- LSI Logic Corporation
- Francois Ducaroir
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Wrap-back test system and method
- Patent number 5,956,370
- Issue date Sep 21, 1999
- LSI Logic Corporation
- Francois Ducaroir
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Programmable synchronization character
- Patent number 5,896,426
- Issue date Apr 20, 1999
- LSI Logic Corporation
- Krishnan Ramamurthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Self test of core with unpredictable latency
- Patent number 5,790,563
- Issue date Aug 4, 1998
- LSI Logic Corp.
- Krishnan Ramamurthy
- G01 - MEASURING TESTING
Information Patent Grant
Loop-back test system and method
- Patent number 5,787,114
- Issue date Jul 28, 1998
- LSI Logic Corporation
- Krishnan Ramamurthy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed phase locked loop test method and means
- Patent number 5,781,038
- Issue date Jul 14, 1998
- LSI Logic Corporation
- Krishnan Ramamurthy
- G01 - MEASURING TESTING
Information Patent Grant
Timing shell generation through netlist reduction
- Patent number 5,644,498
- Issue date Jul 1, 1997
- LSI Logic Corporation
- Christian Joly
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Serial data transmitter with bit doubling
- Publication number 20040101064
- Publication date May 27, 2004
- Michael O. Jenkins
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SERIAL DATA TRANSCEIVER INCLUDING ELEMENTS WHICH FACILITATE FUNCTIO...
- Publication number 20010043648
- Publication date Nov 22, 2001
- FRANCOIS DUCAROIR
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Francois Ducaroir

Person

Patents Grantslast 30 patents

Serial data transmitter with bit doubling

Serial data transceiver including elements which facilitate functio...

Serial data transceiver architecture and test method for measuring...

High speed serial line transceivers integrated into a cache control...

Apparatus and method for testing the ability of a pair of serial da...

Using multiple high speed serial lines to transmit high data rates...

Enhanced receiving chip for a computer monitor

System for sending data from-and-to a computer monitor using a high...

Wrap-back test system and method

Programmable synchronization character

Self test of core with unpredictable latency

Loop-back test system and method

High speed phase locked loop test method and means

Timing shell generation through netlist reduction

Patents Applicationslast 30 patents

Serial data transmitter with bit doubling

SERIAL DATA TRANSCEIVER INCLUDING ELEMENTS WHICH FACILITATE FUNCTIO...