Frank A. Ferraiolo

Person

Newburgh, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Efficient calibration of a low power parallel data communications c...
- Patent number 9,684,629
- Issue date Jun 20, 2017
- International Business Machines Corporation
- Timothy O. Dickson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System interconnect dynamic scaling handshake using spare bit-lane
- Patent number 9,558,139
- Issue date Jan 31, 2017
- International Business Machines Corporation
- Daniel Mark Dreps
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System interconnect dynamic scaling handshake using spare bit-lane
- Patent number 9,552,319
- Issue date Jan 24, 2017
- International Business Machines Corporation
- Daniel Mark Dreps
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System interconnect dynamic scaling by lane width and operating fre...
- Patent number 9,529,406
- Issue date Dec 27, 2016
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System interconnect dynamic scaling by lane width and operating fre...
- Patent number 9,524,013
- Issue date Dec 20, 2016
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus interface optimization by selecting bit-lanes having best perfo...
- Patent number 9,459,982
- Issue date Oct 4, 2016
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient calibration of a low power parallel data communications c...
- Patent number 9,411,750
- Issue date Aug 9, 2016
- International Business Machines Corporation
- Timothy O. Dickson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System interconnect dynamic scaling by predicting I/O requirements
- Patent number 9,324,030
- Issue date Apr 26, 2016
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System interconnect dynamic scaling by predicting I/O requirements
- Patent number 9,324,031
- Issue date Apr 26, 2016
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Configurable differential to single ended IO
- Patent number 9,325,534
- Issue date Apr 26, 2016
- International Business Machines Corporation
- Frank D. Ferraiolo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bus interface optimization by selecting bit-lanes having best perfo...
- Patent number 9,244,799
- Issue date Jan 26, 2016
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel receiver interface with receiver redundancy
- Patent number 9,001,842
- Issue date Apr 7, 2015
- International Business Machines Corporation
- Timothy O. Dickson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low latency data transfer between clock domains operated in various...
- Patent number 8,898,503
- Issue date Nov 25, 2014
- International Business Machines Corporation
- Daniel M. Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel data communications mechanism having reduced power continu...
- Patent number 8,898,504
- Issue date Nov 25, 2014
- International Business Machines Corporation
- Steven J. Baumgartner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Isolation of faulty links in a transmission medium
- Patent number 8,862,944
- Issue date Oct 14, 2014
- International Business Machines Corporation
- John S. Dodson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fault tolerant parallel receiver interface with receiver redundancy
- Patent number 8,861,513
- Issue date Oct 14, 2014
- International Business Machines Corporation
- Timothy O. Dickson
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Dynamic fault detection and repair in a data communications mechanism
- Patent number 8,767,531
- Issue date Jul 1, 2014
- International Business Machines Corporation
- Frank D. Ferraiolo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Calibration of multiple parallel data communications lines for high...
- Patent number 8,681,839
- Issue date Mar 25, 2014
- International Business Machines Corporation
- John F. Bulzacchelli
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Power-on initialization and test for a cascade interconnect memory...
- Patent number 8,139,430
- Issue date Mar 20, 2012
- International Business Machines Corporation
- Peter L. Buchmann
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Enhanced microprocessor interconnect with bit shadowing
- Patent number 8,082,475
- Issue date Dec 20, 2011
- International Business Machines Corporation
- Frank D. Ferraiolo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bit shadowing in a memory system
- Patent number 8,082,474
- Issue date Dec 20, 2011
- International Business Machines Corporation
- Frank D. Ferraiolo
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-healing chip-to-chip interface
- Patent number 8,050,174
- Issue date Nov 1, 2011
- International Business Machines Corporation
- Wiren D. Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-healing chip-to-chip interface
- Patent number 8,018,837
- Issue date Sep 13, 2011
- International Business Machines Corporation
- Wiren D. Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Phase interpolator system and associated methods
- Patent number 8,004,335
- Issue date Aug 23, 2011
- International Business Machines Corporation
- Kyu-hyoun Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Combined alignment scrambler function for elastic interface
- Patent number 8,001,412
- Issue date Aug 16, 2011
- International Business Machines Corporation
- Frank D. Ferraiolo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
On-chip detection of power supply vulnerabilities
- Patent number 7,952,370
- Issue date May 31, 2011
- International Business Machines Corporation
- Frank D. Ferraiolo
- G01 - MEASURING TESTING
Information Patent Grant
Deriving clocks in a memory system
- Patent number 7,934,115
- Issue date Apr 26, 2011
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic segment sparing and repair in a memory system
- Patent number 7,895,374
- Issue date Feb 22, 2011
- International Business Machines Corporation
- Frank D. Ferraiolo
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Self-healing chip-to-chip interface
- Patent number 7,813,266
- Issue date Oct 12, 2010
- International Business Machines Corporation
- Wiren Dale Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
276-pin buffered memory module with enhanced fault tolerance
- Patent number 7,729,153
- Issue date Jun 1, 2010
- International Business Machines Corporation
- Daniel M. Dreps
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Efficient Calibration of a Low Power Parallel Data Communications C...
- Publication number 20160239459
- Publication date Aug 18, 2016
- International Business Machines Corporation
- Timothy O. Dickson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM INTERCONNECT DYNAMIC SCALING HANDSHAKE USING SPARE BIT-LANE
- Publication number 20160048473
- Publication date Feb 18, 2016
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM INTERCONNECT DYNAMIC SCALING HANDSHAKE USING SPARE BIT-LANE
- Publication number 20160050301
- Publication date Feb 18, 2016
- International Business Machines Corporation
- Daniel Mark Dreps
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEM INTERCONNECT DYNAMIC SCALING BY LANE WIDTH AND OPERATING FRE...
- Publication number 20150301576
- Publication date Oct 22, 2015
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM INTERCONNECT DYNAMIC SCALING BY LANE WIDTH AND OPERATING FRE...
- Publication number 20150301575
- Publication date Oct 22, 2015
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUS INTERFACE OPTIMIZATION BY SELECTING BIT-LANES HAVING BEST PERFO...
- Publication number 20150193287
- Publication date Jul 9, 2015
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM INTERCONNECT DYNAMIC SCALING BY PREDICTING I/O REQUIREMENTS
- Publication number 20150193690
- Publication date Jul 9, 2015
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUS INTERFACE OPTIMIZATION BY SELECTING BIT-LANES HAVING BEST PERFO...
- Publication number 20150193316
- Publication date Jul 9, 2015
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM INTERCONNECT DYNAMIC SCALING BY PREDICTING I/O REQUIREMENTS
- Publication number 20150192981
- Publication date Jul 9, 2015
- International Business Machines Corporation
- Daniel Mark Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY DATA TRANSFER BETWEEN CLOCK DOMAINS OPERATED IN VARIOUS...
- Publication number 20140136737
- Publication date May 15, 2014
- International Business Machines Corporation
- Daniel M. Dreps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient Calibration of a Low Power Parallel Data Communications C...
- Publication number 20140032799
- Publication date Jan 30, 2014
- International Business Machines Corporation
- Timothy O. Dickson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL RECEIVER INTERFACE WITH RECEIVER REDUNDANCY
- Publication number 20130343401
- Publication date Dec 26, 2013
- International Business Machines Corporation
- Timothy O. Dickson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT TOLERANT PARALLEL RECEIVER INTERFACE WITH RECEIVER REDUNDANCY
- Publication number 20130343402
- Publication date Dec 26, 2013
- International Business Machines Corporation
- Timothy O. Dickson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Communicating Control Information for a Data Communications Link Vi...
- Publication number 20130188656
- Publication date Jul 25, 2013
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Parallel Data Communications Mechanism Having Reduced Power Continu...
- Publication number 20130159761
- Publication date Jun 20, 2013
- International Business Machines Corporation
- Steven J. Baumgartner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Dynamic Fault Detection and Repair in a Data Communications Mechanism
- Publication number 20120151247
- Publication date Jun 14, 2012
- International Business Machines Corporation
- Frank D. Ferraiolo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Coordinating Communications Interface Activities in Data Communicat...
- Publication number 20120106539
- Publication date May 3, 2012
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Calibration of Multiple Parallel Data Communications Lines for High...
- Publication number 20120106687
- Publication date May 3, 2012
- International Business Machines Corporation
- John F. Bulzacchelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ISOLATION OF FAULTY LINKS IN A TRANSMISSION MEDIUM
- Publication number 20110320881
- Publication date Dec 29, 2011
- International Business Machines Corporation
- John S. Dodson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable Differential to Single Ended IO
- Publication number 20110075740
- Publication date Mar 31, 2011
- International Business Machines Corporation
- Frank D. Ferraiolo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Self-Healing Chip-to-Chip Interface
- Publication number 20110010482
- Publication date Jan 13, 2011
- International Business Machines Corporation
- Wiren Dale Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ON-CHIP DETECTION OF POWER SUPPLY VULNERABILITIES
- Publication number 20100109700
- Publication date May 6, 2010
- International Business Machines Corporation
- Frank D. Ferraiolo
- G01 - MEASURING TESTING
Information Patent Application
Self-Healing Chip-to-Chip Interface
- Publication number 20100085872
- Publication date Apr 8, 2010
- International Business Machines Corporation
- Wiren Dale Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DYNAMIC SEGMENT SPARING AND REPAIR IN A MEMORY SYSTEM
- Publication number 20100005202
- Publication date Jan 7, 2010
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROPROCESSOR INTERFACE WITH DYNAMIC SEGMENT SPARING AND REPAIR
- Publication number 20100005335
- Publication date Jan 7, 2010
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCED MICROPROCESSOR INTERCONNECT WITH BIT SHADOWING
- Publication number 20100005349
- Publication date Jan 7, 2010
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER-ON INITIALIZATION AND TEST FOR A CASCADE INTERCONNECT MEMORY...
- Publication number 20100005281
- Publication date Jan 7, 2010
- International Business Machines Corporation
- Peter L. Buchmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIT SHADOWING IN A MEMORY SYSTEM
- Publication number 20100005345
- Publication date Jan 7, 2010
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DERIVING CLOCKS IN A MEMORY SYSTEM
- Publication number 20090094476
- Publication date Apr 9, 2009
- International Business Machines Corporation
- Frank D. Ferraiolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED ALIGNMENT SCRAMBLER FUNCTION FOR ELASTIC INTERFACE
- Publication number 20080201599
- Publication date Aug 21, 2008
- Frank D. Ferraiolo
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Frank A. Ferraiolo

Person

Patents Grantslast 30 patents

Efficient calibration of a low power parallel data communications c...

System interconnect dynamic scaling handshake using spare bit-lane

System interconnect dynamic scaling handshake using spare bit-lane

System interconnect dynamic scaling by lane width and operating fre...

System interconnect dynamic scaling by lane width and operating fre...

Bus interface optimization by selecting bit-lanes having best perfo...

Efficient calibration of a low power parallel data communications c...

System interconnect dynamic scaling by predicting I/O requirements

System interconnect dynamic scaling by predicting I/O requirements

Configurable differential to single ended IO

Bus interface optimization by selecting bit-lanes having best perfo...

Parallel receiver interface with receiver redundancy

Low latency data transfer between clock domains operated in various...

Parallel data communications mechanism having reduced power continu...

Isolation of faulty links in a transmission medium

Fault tolerant parallel receiver interface with receiver redundancy

Dynamic fault detection and repair in a data communications mechanism

Calibration of multiple parallel data communications lines for high...

Power-on initialization and test for a cascade interconnect memory...

Enhanced microprocessor interconnect with bit shadowing

Bit shadowing in a memory system

Self-healing chip-to-chip interface

Self-healing chip-to-chip interface

Phase interpolator system and associated methods

Combined alignment scrambler function for elastic interface

On-chip detection of power supply vulnerabilities

Deriving clocks in a memory system

Dynamic segment sparing and repair in a memory system

Self-healing chip-to-chip interface

276-pin buffered memory module with enhanced fault tolerance

Patents Applicationslast 30 patents

Efficient Calibration of a Low Power Parallel Data Communications C...

SYSTEM INTERCONNECT DYNAMIC SCALING HANDSHAKE USING SPARE BIT-LANE

SYSTEM INTERCONNECT DYNAMIC SCALING HANDSHAKE USING SPARE BIT-LANE

SYSTEM INTERCONNECT DYNAMIC SCALING BY LANE WIDTH AND OPERATING FRE...

SYSTEM INTERCONNECT DYNAMIC SCALING BY LANE WIDTH AND OPERATING FRE...

BUS INTERFACE OPTIMIZATION BY SELECTING BIT-LANES HAVING BEST PERFO...

SYSTEM INTERCONNECT DYNAMIC SCALING BY PREDICTING I/O REQUIREMENTS

BUS INTERFACE OPTIMIZATION BY SELECTING BIT-LANES HAVING BEST PERFO...

SYSTEM INTERCONNECT DYNAMIC SCALING BY PREDICTING I/O REQUIREMENTS

LOW LATENCY DATA TRANSFER BETWEEN CLOCK DOMAINS OPERATED IN VARIOUS...

Efficient Calibration of a Low Power Parallel Data Communications C...

PARALLEL RECEIVER INTERFACE WITH RECEIVER REDUNDANCY

FAULT TOLERANT PARALLEL RECEIVER INTERFACE WITH RECEIVER REDUNDANCY

Communicating Control Information for a Data Communications Link Vi...

Parallel Data Communications Mechanism Having Reduced Power Continu...

Dynamic Fault Detection and Repair in a Data Communications Mechanism

Coordinating Communications Interface Activities in Data Communicat...

Calibration of Multiple Parallel Data Communications Lines for High...

ISOLATION OF FAULTY LINKS IN A TRANSMISSION MEDIUM

Configurable Differential to Single Ended IO

Self-Healing Chip-to-Chip Interface

ON-CHIP DETECTION OF POWER SUPPLY VULNERABILITIES

Self-Healing Chip-to-Chip Interface

DYNAMIC SEGMENT SPARING AND REPAIR IN A MEMORY SYSTEM

MICROPROCESSOR INTERFACE WITH DYNAMIC SEGMENT SPARING AND REPAIR

ENHANCED MICROPROCESSOR INTERCONNECT WITH BIT SHADOWING

POWER-ON INITIALIZATION AND TEST FOR A CASCADE INTERCONNECT MEMORY...

BIT SHADOWING IN A MEMORY SYSTEM

DERIVING CLOCKS IN A MEMORY SYSTEM

COMBINED ALIGNMENT SCRAMBLER FUNCTION FOR ELASTIC INTERFACE